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[61.220.137.37]) by smtp.gmail.com with ESMTPSA id bo16sm1835164pjb.41.2020.10.29.23.03.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2020 23:03:08 -0700 (PDT) From: AceLan Kao To: kernel-team@lists.ubuntu.com Subject: [PATCH 15/23][SRU][OEM-5.6] platform/x86: intel_pmc_core: Make pmc_core_lpm_display() generic for platforms that support sub-states Date: Fri, 30 Oct 2020 14:02:06 +0800 Message-Id: <20201030060214.780883-21-acelan.kao@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201030060214.780883-1-acelan.kao@canonical.com> References: <20201030060214.780883-1-acelan.kao@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.196; envelope-from=acelan@gmail.com; helo=mail-pl1-f196.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Gayatri Kammela BugLink: https://bugs.launchpad.net/bugs/1899883 Currently pmc_core_lpm_display() uses an array of the struct pointers, i.e. tgl_lpm_maps for Tiger Lake directly to iterate through and to get the number of (live) status registers which is hard coded and can not be re-used for the future platforms that support sub-states. To maintain readability, make pmc_core_lpm_display() generic, so that it can be re-used for future platforms. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Suggested-by: Andy Shevchenko Signed-off-by: Gayatri Kammela Signed-off-by: Andy Shevchenko (cherry picked from commit 267fc714cab797574a3a9df2074f05c3cdeb2511) Signed-off-by: AceLan Kao --- drivers/platform/x86/intel_pmc_core.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index af051986f31d..9a031f4e36f2 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -639,20 +640,35 @@ static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, } } +static int pmc_core_lpm_get_arr_size(const struct pmc_bit_map **maps) +{ + int idx; + + for (idx = 0; maps[idx]; idx++) + ;/* Nothing */ + + return idx; +} + static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, struct seq_file *s, u32 offset, const char *str, const struct pmc_bit_map **maps) { - u32 lpm_regs[ARRAY_SIZE(tgl_lpm_maps)-1]; - int index, idx, len = 32, bit_mask; + int index, idx, len = 32, bit_mask, arr_size; + u32 *lpm_regs; + + arr_size = pmc_core_lpm_get_arr_size(maps); + lpm_regs = kmalloc_array(arr_size, sizeof(*lpm_regs), GFP_KERNEL); + if (!lpm_regs) + return; - for (index = 0; tgl_lpm_maps[index]; index++) { + for (index = 0; index < arr_size; index++) { lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); offset += 4; } - for (idx = 0; maps[idx]; idx++) { + for (idx = 0; idx < arr_size; idx++) { if (dev) dev_dbg(dev, "\nLPM_%s_%d:\t0x%x\n", str, idx, lpm_regs[idx]); @@ -671,6 +687,8 @@ static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, lpm_regs[idx] & bit_mask ? 1 : 0); } } + + kfree(lpm_regs); } #if IS_ENABLED(CONFIG_DEBUG_FS)