From patchwork Tue Sep 22 10:42:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1368972 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BwdF733TGz9sSC; Tue, 22 Sep 2020 20:43:07 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1kKflI-00034D-5W; Tue, 22 Sep 2020 10:43:04 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1kKflF-00033w-WB for kernel-team@lists.ubuntu.com; Tue, 22 Sep 2020 10:43:01 +0000 Received: from 61-220-137-37.hinet-ip.hinet.net ([61.220.137.37] helo=localhost) by youngberry.canonical.com with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1kKflF-0001fJ-9Z for kernel-team@lists.ubuntu.com; Tue, 22 Sep 2020 10:43:01 +0000 From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [G/Unstable] [PATCH] UBUNTU: SAUCE: PCI/ASPM: Enable LTR for endpoints behind VMD Date: Tue, 22 Sep 2020 18:42:54 +0800 Message-Id: <20200922104255.24902-2-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200922104255.24902-1-kai.heng.feng@canonical.com> References: <20200922104255.24902-1-kai.heng.feng@canonical.com> X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1896598 In addition to ASPM, LTR also needs to be programmed with a reasonable value to let PCIe link reaches L1.2. For now, program a hardcoded value that is used under Windows. While at it, consolidate ASPM and LTR enabling logic to share a same pci device table. Signed-off-by: Kai-Heng Feng --- drivers/pci/quirks.c | 48 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 3 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 22671d1d8f86..17526e793dbc 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5672,13 +5672,55 @@ DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); /* - * Device [8086:9a09] + * Device [8086:9a09], [8086:a0b0] and [8086:a0bc] * BIOS may not be able to access config space of devices under VMD domain, so * it relies on software to enable ASPM for links under VMD. */ +static const struct pci_device_id vmd_bridge_tbl[] = { + { PCI_VDEVICE(INTEL, 0x9a09) }, + { PCI_VDEVICE(INTEL, 0xa0b0) }, + { PCI_VDEVICE(INTEL, 0xa0bc) }, + { } +}; + static void pci_fixup_enable_aspm(struct pci_dev *pdev) { + if (!pci_match_id(vmd_bridge_tbl, pdev)) + return; + pdev->dev_flags |= PCI_DEV_FLAGS_ENABLE_ASPM; } -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a09, pci_fixup_enable_aspm); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa0b0, pci_fixup_enable_aspm); +DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, + PCI_CLASS_BRIDGE_PCI, 8, pci_fixup_enable_aspm); + +static void pci_fixup_enable_vmd_nvme_ltr(struct pci_dev *pdev) +{ + struct pci_dev *parent; + int pos; + u16 val; + + parent = pci_upstream_bridge(pdev); + if (!parent) + return; + + if (!pci_match_id(vmd_bridge_tbl, parent)) + return; + + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR); + if (!pos) + return; + + pci_read_config_word(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, &val); + if (val) + return; + + pci_read_config_word(pdev, pos + PCI_LTR_MAX_NOSNOOP_LAT, &val); + if (val) + return; + + /* 3145728ns, i.e. 0x300000ns */ + pci_write_config_word(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, 0x1003); + pci_write_config_word(pdev, pos + PCI_LTR_MAX_NOSNOOP_LAT, 0x1003); +} +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_STORAGE_EXPRESS, 0, pci_fixup_enable_vmd_nvme_ltr);