From patchwork Fri Aug 14 06:57:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1344679 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=canonical.com Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BSZ6j6rM6z9sTX; Fri, 14 Aug 2020 16:59:09 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1k6Tg8-0008Rg-B5; Fri, 14 Aug 2020 06:59:04 +0000 Received: from mail-pf1-f175.google.com ([209.85.210.175]) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1k6Tg1-0008C9-9z for kernel-team@lists.ubuntu.com; Fri, 14 Aug 2020 06:58:57 +0000 Received: by mail-pf1-f175.google.com with SMTP id f193so4095329pfa.12 for ; Thu, 13 Aug 2020 23:58:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3t2U39tIOF+eM8aBiCXljQ2f8RquEn3sMBIfx+VreH8=; b=afDFnQL63V8+3qL6oEcMj1yRYVZ7Ji6EtoTZ4+HKMkeHu7aYYqmNOVCtlJqp39rqju WYL+AvpON6lwHYZ6HyNFMJD5KyHcP5wPybpzxU2Y/UTMMF4GqhR7U7sOqFIKa+YKcGcO HwPXtbF4JFLSo1W5BvcMw5cYtL/WnPtfOY0BL+LyAh6TJ5mwBRl/A7L6pAgh/fQX5UeZ aXfHyDWOWicW+w1MVKOJqZ/XIMWKsvvDHtiGulY7vmfrtx0aAKhfdDu+pQHYmI2aidlh EFHtd/mtNBTlQkUQT++U4SznDMyhE4EZYv11NreITZCEo6xoHUfi3uYN5COLEf5r9OxG 247g== X-Gm-Message-State: AOAM5311Sdl0AfEc6vI0nbky+NSvmI3E0wW6sVKXMNuglpUX7Tl0pX6N xrwGAZIqvSI31o1yFAAcb/3IX6q4MCxXsA== X-Google-Smtp-Source: ABdhPJxLNX3m1HFpF4JfG2KjQvrxC4eMM0wYQwz3z6yrGTBDqdVg7gs0S8fy8ScftLthbV1UfzljcA== X-Received: by 2002:a62:8141:: with SMTP id t62mr828214pfd.282.1597388325841; Thu, 13 Aug 2020 23:58:45 -0700 (PDT) Received: from localhost (61-220-137-37.HINET-IP.hinet.net. [61.220.137.37]) by smtp.gmail.com with ESMTPSA id y1sm7833608pfl.136.2020.08.13.23.58.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2020 23:58:45 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 24/31][SRU][OEM-5.6] drm/i915: Introduce skl_plane_wm_level accessor. Date: Fri, 14 Aug 2020 14:57:33 +0800 Message-Id: <20200814065740.276039-25-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814065740.276039-1-vicamo.yang@canonical.com> References: <20200814065740.276039-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.210.175; envelope-from=vicamo@gmail.com; helo=mail-pf1-f175.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Stanislav Lisovskiy BugLink: https://bugs.launchpad.net/bugs/1891451 For future Gen12 SAGV implementation we need to seemlessly alter wm levels calculated, depending on whether we are allowed to enable SAGV or not. So this accessor will give additional flexibility to do that. Currently this accessor is still simply working as "pass-through" function. This will be changed in next coming patches from this series. v2: - plane_id -> plane->id(Ville Syrjälä) - Moved wm_level var to have more local scope (Ville Syrjälä) - Renamed yuv to color_plane(Ville Syrjälä) in skl_plane_wm_level v3: - plane->id -> plane_id(this time for real, Ville Syrjälä) - Changed colorplane id type from boolean to int as index (Ville Syrjälä) - Moved crtc_state param so that it is first now (Ville Syrjälä) - Moved wm_level declaration to tigher scope in skl_write_plane_wm(Ville Syrjälä) v4: - Started to use enum values for color plane - Do sizeof for a type what we are memset'ing - Zero out wm_uv as well(Ville Syrjälä) v5: - Fixed rebase conflict caused by COLOR_PLANE_* enum removal v6: - Do not use skl_plane_wm_level accessor in skl_allocate_pipe_ddb v7: - Get rid of wm_uv, which is not used in skl_plane_write_wm(Ville) Signed-off-by: Stanislav Lisovskiy Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20200513093816.11466-2-stanislav.lisovskiy@intel.com (cherry picked from commit d9162348db12487754e61f73497bdcfcea753590) Signed-off-by: You-Sheng Yang --- drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index cdc27982a200..8b4868462d3f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4633,6 +4633,17 @@ icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state, return total_data_rate; } +static const struct skl_wm_level * +skl_plane_wm_level(const struct intel_crtc_state *crtc_state, + enum plane_id plane_id, + int level) +{ + const struct skl_plane_wm *wm = + &crtc_state->wm.skl.optimal.planes[plane_id]; + + return &wm->wm[level]; +} + static int skl_allocate_pipe_ddb(struct intel_crtc_state *crtc_state) { @@ -5446,8 +5457,12 @@ void skl_write_plane_wm(struct intel_plane *plane, &crtc_state->wm.skl.plane_ddb_uv[plane_id]; for (level = 0; level <= max_level; level++) { + const struct skl_wm_level *wm_level; + + wm_level = skl_plane_wm_level(crtc_state, plane_id, level); + skl_write_wm_level(dev_priv, PLANE_WM(pipe, plane_id, level), - &wm->wm[level]); + wm_level); } skl_write_wm_level(dev_priv, PLANE_WM_TRANS(pipe, plane_id), &wm->trans_wm); @@ -5480,8 +5495,12 @@ void skl_write_cursor_wm(struct intel_plane *plane, &crtc_state->wm.skl.plane_ddb_y[plane_id]; for (level = 0; level <= max_level; level++) { + const struct skl_wm_level *wm_level; + + wm_level = skl_plane_wm_level(crtc_state, plane_id, level); + skl_write_wm_level(dev_priv, CUR_WM(pipe, level), - &wm->wm[level]); + wm_level); } skl_write_wm_level(dev_priv, CUR_WM_TRANS(pipe), &wm->trans_wm);