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[SRU,BIONIC,2/2] iommu/amd: Set exclusion range correctly

Message ID 20190607174730.13011-3-jeffrey.lane@canonical.com
State New
Headers show
Series [SRU,BIONIC,1/2] iommu/amd: Reserve exclusion range in iova-domain | expand

Commit Message

Jeff Lane June 7, 2019, 5:47 p.m. UTC 
From: Joerg Roedel <jroedel@suse.de>

BugLink: https://bugs.launchpad.net/bugs/1823037

The exlcusion range limit register needs to contain the
base-address of the last page that is part of the range, as
bits 0-11 of this register are treated as 0xfff by the
hardware for comparisons.

So correctly set the exclusion range in the hardware to the
last page which is _in_ the range.

Fixes: b2026aa2dce44 ('x86, AMD IOMMU: add functions for programming IOMMU MMIO space')
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit 3c677d206210f53a4be972211066c0f1cd47fe12 5.2-rc1)
Signed-off-by: Jeffrey Lane <jeffrey.lane@canonical.com>
---
 drivers/iommu/amd_iommu_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index c304ca07047c..54da51523ca8 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -356,7 +356,7 @@  static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val)
 static void iommu_set_exclusion_range(struct amd_iommu *iommu)
 {
 	u64 start = iommu->exclusion_start & PAGE_MASK;
-	u64 limit = (start + iommu->exclusion_length) & PAGE_MASK;
+	u64 limit = (start + iommu->exclusion_length - 1) & PAGE_MASK;
 	u64 entry;
 
 	if (!iommu->exclusion_start)