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[Zesty,v2,02/13] powerpc/64s: Add SCV FSCR bit for ISA v3.0

Message ID 20170523132748.19944-3-gwalbon@linux.vnet.ibm.com
State New
Headers show

Commit Message

Gustavo Walbon May 23, 2017, 1:27 p.m. UTC 
From: Nicholas Piggin <npiggin@gmail.com>

Buglink : http://bugs.launchpad.net/bugs/1691973

Add the bit definition and use it in facility_unavailable_exception() so we can
intelligently report the cause if we take a fault for SCV. This doesn't actually
enable SCV.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Drop whitespace changes to the existing entries, flush out change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

(cherry picked from commit 9b7ff0c6586bc0541ebcd1ff6773b11a49f1a058 in
linux-next)
Signed-off-by: Gustavo Walbon <gwalbon@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/reg.h | 2 ++
 arch/powerpc/kernel/traps.c    | 1 +
 2 files changed, 3 insertions(+)
diff mbox

Patch

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 763ae4fb5282..3f3af5f7774d 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -310,6 +310,7 @@ 
 #define SPRN_PMCR	0x374	/* Power Management Control Register */
 
 /* HFSCR and FSCR bit numbers are the same */
+#define FSCR_SCV_LG	12	/* Enable System Call Vectored */
 #define FSCR_MSGP_LG	10	/* Enable MSGP */
 #define FSCR_TAR_LG	8	/* Enable Target Address Register */
 #define FSCR_EBB_LG	7	/* Enable Event Based Branching */
@@ -320,6 +321,7 @@ 
 #define FSCR_VECVSX_LG	1	/* Enable VMX/VSX  */
 #define FSCR_FP_LG	0	/* Enable Floating Point */
 #define SPRN_FSCR	0x099	/* Facility Status & Control Register */
+#define   FSCR_SCV	__MASK(FSCR_SCV_LG)
 #define   FSCR_TAR	__MASK(FSCR_TAR_LG)
 #define   FSCR_EBB	__MASK(FSCR_EBB_LG)
 #define   FSCR_DSCR	__MASK(FSCR_DSCR_LG)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 9f025ea2216d..e3655d7e66e2 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1440,6 +1440,7 @@  void facility_unavailable_exception(struct pt_regs *regs)
 		[FSCR_EBB_LG] = "EBB",
 		[FSCR_TAR_LG] = "TAR",
 		[FSCR_MSGP_LG] = "MSGP",
+		[FSCR_SCV_LG] = "SCV",
 	};
 	char *facility = "unknown";
 	u64 value;