[4/4] perf tools: Add AVX-512 instructions to the new instructions test

Message ID	1472056536-11587-5-git-send-email-tim.gardner@canonical.com
State	New
Headers	show Return-Path: <kernel-team-bounces@lists.ubuntu.com> From: Tim Gardner <tim.gardner@canonical.com> To: kernel-team@lists.ubuntu.com Subject: [PATCH 4/4] perf tools: Add AVX-512 instructions to the new instructions test Date: Wed, 24 Aug 2016 10:35:36 -0600 Message-Id: <1472056536-11587-5-git-send-email-tim.gardner@canonical.com> In-Reply-To: <1472056536-11587-1-git-send-email-tim.gardner@canonical.com> References: <1472056536-11587-1-git-send-email-tim.gardner@canonical.com> Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: kernel-team-bounces@lists.ubuntu.com

diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-32.c b/tools/perf/arch/x86/tests/insn-x86-dat-32.c index ca08e6e..3918dd5 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-32.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-32.c @@ -8,6 +8,1014 @@ "0f 31 \trdtsc ",}, {{0xc4, 0xe2, 0x7d, 0x13, 0xeb, }, 5, 0, "", "", "c4 e2 7d 13 eb \tvcvtph2ps %xmm3,%ymm5",}, +{{0x62, 0x81, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "", +"62 81 78 56 34 12 \tbound %eax,0x12345678(%ecx)",}, +{{0x62, 0x88, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "", +"62 88 78 56 34 12 \tbound %ecx,0x12345678(%eax)",}, +{{0x62, 0x90, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "", +"62 90 78 56 34 12 \tbound %edx,0x12345678(%eax)",}, +{{0x62, 0x98, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "", +"62 98 78 56 34 12 \tbound %ebx,0x12345678(%eax)",}, +{{0x62, 0xa0, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "", +"62 a0 78 56 34 12 \tbound %esp,0x12345678(%eax)",}, +{{0x62, 0xa8, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "", +"62 a8 78 56 34 12 \tbound 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$0x12,%xmm7,%k5",}, +{{0x62, 0xf3, 0xfd, 0x08, 0x67, 0xef, 0x12, }, 7, 0, "", "", +"62 f3 fd 08 67 ef 12 \tvfpclasssd $0x12,%xmm7,%k5",}, +{{0x62, 0xf1, 0x4d, 0x48, 0x72, 0xc5, 0x12, }, 7, 0, "", "", +"62 f1 4d 48 72 c5 12 \tvprord $0x12,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xcd, 0x48, 0x72, 0xc5, 0x12, }, 7, 0, "", "", +"62 f1 cd 48 72 c5 12 \tvprorq $0x12,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0x4d, 0x48, 0x72, 0xcd, 0x12, }, 7, 0, "", "", +"62 f1 4d 48 72 cd 12 \tvprold $0x12,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xcd, 0x48, 0x72, 0xcd, 0x12, }, 7, 0, "", "", +"62 f1 cd 48 72 cd 12 \tvprolq $0x12,%zmm5,%zmm6",}, +{{0x0f, 0x72, 0xe6, 0x02, }, 4, 0, "", "", +"0f 72 e6 02 \tpsrad $0x2,%mm6",}, +{{0xc5, 0xed, 0x72, 0xe6, 0x05, }, 5, 0, "", "", +"c5 ed 72 e6 05 \tvpsrad $0x5,%ymm6,%ymm2",}, +{{0x62, 0xf1, 0x6d, 0x48, 0x72, 0xe6, 0x05, }, 7, 0, "", "", +"62 f1 6d 48 72 e6 05 \tvpsrad $0x5,%zmm6,%zmm2",}, +{{0x62, 0xf1, 0xed, 0x48, 0x72, 0xe6, 0x05, }, 7, 0, "", "", +"62 f1 ed 48 72 e6 05 \tvpsraq $0x5,%zmm6,%zmm2",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc6, 0x8c, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c6 8c fd 7b 00 00 00 \tvgatherpf0dps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc6, 0x8c, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c6 8c fd 7b 00 00 00 \tvgatherpf0dpd 0x7b(%ebp,%ymm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc6, 0x94, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c6 94 fd 7b 00 00 00 \tvgatherpf1dps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc6, 0x94, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c6 94 fd 7b 00 00 00 \tvgatherpf1dpd 0x7b(%ebp,%ymm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc6, 0xac, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c6 ac fd 7b 00 00 00 \tvscatterpf0dps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc6, 0xac, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c6 ac fd 7b 00 00 00 \tvscatterpf0dpd 0x7b(%ebp,%ymm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc6, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c6 b4 fd 7b 00 00 00 \tvscatterpf1dps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc6, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c6 b4 fd 7b 00 00 00 \tvscatterpf1dpd 0x7b(%ebp,%ymm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc7, 0x8c, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c7 8c fd 7b 00 00 00 \tvgatherpf0qps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc7, 0x8c, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c7 8c fd 7b 00 00 00 \tvgatherpf0qpd 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc7, 0x94, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c7 94 fd 7b 00 00 00 \tvgatherpf1qps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc7, 0x94, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c7 94 fd 7b 00 00 00 \tvgatherpf1qpd 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc7, 0xac, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c7 ac fd 7b 00 00 00 \tvscatterpf0qps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc7, 0xac, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c7 ac fd 7b 00 00 00 \tvscatterpf0qpd 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0x7d, 0x49, 0xc7, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 7d 49 c7 b4 fd 7b 00 00 00 \tvscatterpf1qps 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf2, 0xfd, 0x49, 0xc7, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 f2 fd 49 c7 b4 fd 7b 00 00 00 \tvscatterpf1qpd 0x7b(%ebp,%zmm7,8){%k1}",}, +{{0x62, 0xf1, 0xd5, 0x48, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 48 58 f4 \tvaddpd %zmm4,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x4f, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 4f 58 f4 \tvaddpd %zmm4,%zmm5,%zmm6{%k7}",}, +{{0x62, 0xf1, 0xd5, 0xcf, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 cf 58 f4 \tvaddpd %zmm4,%zmm5,%zmm6{%k7}{z}",}, +{{0x62, 0xf1, 0xd5, 0x18, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 18 58 f4 \tvaddpd {rn-sae},%zmm4,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x58, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 58 58 f4 \tvaddpd {ru-sae},%zmm4,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x38, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 38 58 f4 \tvaddpd {rd-sae},%zmm4,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x78, 0x58, 0xf4, }, 6, 0, "", "", +"62 f1 d5 78 58 f4 \tvaddpd {rz-sae},%zmm4,%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x48, 0x58, 0x31, }, 6, 0, "", "", +"62 f1 d5 48 58 31 \tvaddpd (%ecx),%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x48, 0x58, 0xb4, 0xc8, 0x23, 0x01, 0x00, 0x00, }, 11, 0, "", "", +"62 f1 d5 48 58 b4 c8 23 01 00 00 \tvaddpd 0x123(%eax,%ecx,8),%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x58, 0x58, 0x31, }, 6, 0, "", "", +"62 f1 d5 58 58 31 \tvaddpd (%ecx){1to8},%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x48, 0x58, 0x72, 0x7f, }, 7, 0, "", "", +"62 f1 d5 48 58 72 7f \tvaddpd 0x1fc0(%edx),%zmm5,%zmm6",}, +{{0x62, 0xf1, 0xd5, 0x58, 0x58, 0x72, 0x7f, }, 7, 0, "", "", +"62 f1 d5 58 58 72 7f \tvaddpd 0x3f8(%edx){1to8},%zmm5,%zmm6",}, +{{0x62, 0xf1, 0x4c, 0x58, 0xc2, 0x6a, 0x7f, 0x08, }, 8, 0, "", "", +"62 f1 4c 58 c2 6a 7f 08 \tvcmpeq_uqps 0x1fc(%edx){1to16},%zmm6,%k5",}, +{{0x62, 0xf1, 0xe7, 0x0f, 0xc2, 0xac, 0xc8, 0x23, 0x01, 0x00, 0x00, 0x01, }, 12, 0, "", "", +"62 f1 e7 0f c2 ac c8 23 01 00 00 01 \tvcmpltsd 0x123(%eax,%ecx,8),%xmm3,%k5{%k7}",}, +{{0x62, 0xf1, 0xd7, 0x1f, 0xc2, 0xec, 0x02, }, 7, 0, "", "", +"62 f1 d7 1f c2 ec 02 \tvcmplesd {sae},%xmm4,%xmm5,%k5{%k7}",}, +{{0x62, 0xf3, 0x5d, 0x0f, 0x27, 0xac, 0xc8, 0x23, 0x01, 0x00, 0x00, 0x5b, }, 12, 0, "", "", +"62 f3 5d 0f 27 ac c8 23 01 00 00 5b \tvgetmantss $0x5b,0x123(%eax,%ecx,8),%xmm4,%xmm5{%k7}",}, {{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", "f3 0f 1b 00 \tbndmk (%eax),%bnd0",}, {{0xf3, 0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", @@ -311,19 +1319,19 @@ {{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", "0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%eax,%ecx,1)",}, {{0xf2, 0xe8, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "call", "unconditional", -"f2 e8 fc ff ff ff \tbnd call 3c8 <main+0x3c8>",}, +"f2 e8 fc ff ff ff \tbnd call fce <main+0xfce>",}, {{0xf2, 0xff, 0x10, }, 3, 0, "call", "indirect", "f2 ff 10 \tbnd call *(%eax)",}, {{0xf2, 0xc3, }, 2, 0, "ret", "indirect", "f2 c3 \tbnd ret ",}, {{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional", -"f2 e9 fc ff ff ff \tbnd jmp 3d3 <main+0x3d3>",}, +"f2 e9 fc ff ff ff \tbnd jmp fd9 <main+0xfd9>",}, {{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional", -"f2 e9 fc ff ff ff \tbnd jmp 3d9 <main+0x3d9>",}, +"f2 e9 fc ff ff ff \tbnd jmp fdf <main+0xfdf>",}, {{0xf2, 0xff, 0x21, }, 3, 0, "jmp", "indirect", "f2 ff 21 \tbnd jmp *(%ecx)",}, {{0xf2, 0x0f, 0x85, 0xfc, 0xff, 0xff, 0xff, }, 7, 0xfffffffc, "jcc", "conditional", -"f2 0f 85 fc ff ff ff \tbnd jne 3e3 <main+0x3e3>",}, +"f2 0f 85 fc ff ff ff \tbnd jne fe9 <main+0xfe9>",}, {{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "", "0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",}, {{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "", diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-64.c b/tools/perf/arch/x86/tests/insn-x86-dat-64.c index 262d9d2..9c8c61e 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-64.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-64.c @@ -8,6 +8,936 @@ "0f 31 \trdtsc ",}, {{0xc4, 0xe2, 0x7d, 0x13, 0xeb, }, 5, 0, "", "", "c4 e2 7d 13 eb \tvcvtph2ps %xmm3,%ymm5",}, +{{0x48, 0x0f, 0x41, 0xd8, }, 4, 0, "", "", +"48 0f 41 d8 \tcmovno %rax,%rbx",}, +{{0x48, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"48 0f 41 88 78 56 34 12 \tcmovno 0x12345678(%rax),%rcx",}, +{{0x66, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", +"66 0f 41 88 78 56 34 12 \tcmovno 0x12345678(%rax),%cx",}, +{{0x48, 0x0f, 0x44, 0xd8, }, 4, 0, "", "", +"48 0f 44 d8 \tcmove %rax,%rbx",}, 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0x00, 0x00, }, 11, 0, "", "", +"62 92 fd 41 c7 8c fe 7b 00 00 00 \tvgatherpf0qpd 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 92 7d 41 c7 94 fe 7b 00 00 00 \tvgatherpf1qps 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 92 fd 41 c7 94 fe 7b 00 00 00 \tvgatherpf1qpd 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 92 7d 41 c7 ac fe 7b 00 00 00 \tvscatterpf0qps 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 92 fd 41 c7 ac fe 7b 00 00 00 \tvscatterpf0qpd 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 92 7d 41 c7 b4 fe 7b 00 00 00 \tvscatterpf1qps 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "", +"62 92 fd 41 c7 b4 fe 7b 00 00 00 \tvscatterpf1qpd 0x7b(%r14,%zmm31,8){%k1}",}, +{{0x62, 0x01, 0x95, 0x40, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 40 58 f4 \tvaddpd %zmm28,%zmm29,%zmm30",}, +{{0x62, 0x01, 0x95, 0x47, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 47 58 f4 \tvaddpd %zmm28,%zmm29,%zmm30{%k7}",}, +{{0x62, 0x01, 0x95, 0xc7, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 c7 58 f4 \tvaddpd %zmm28,%zmm29,%zmm30{%k7}{z}",}, +{{0x62, 0x01, 0x95, 0x10, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 10 58 f4 \tvaddpd {rn-sae},%zmm28,%zmm29,%zmm30",}, +{{0x62, 0x01, 0x95, 0x50, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 50 58 f4 \tvaddpd {ru-sae},%zmm28,%zmm29,%zmm30",}, +{{0x62, 0x01, 0x95, 0x30, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 30 58 f4 \tvaddpd {rd-sae},%zmm28,%zmm29,%zmm30",}, +{{0x62, 0x01, 0x95, 0x70, 0x58, 0xf4, }, 6, 0, "", "", +"62 01 95 70 58 f4 \tvaddpd {rz-sae},%zmm28,%zmm29,%zmm30",}, +{{0x62, 0x61, 0x95, 0x40, 0x58, 0x31, }, 6, 0, "", "", +"62 61 95 40 58 31 \tvaddpd (%rcx),%zmm29,%zmm30",}, +{{0x62, 0x21, 0x95, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, }, 11, 0, "", "", +"62 21 95 40 58 b4 f0 23 01 00 00 \tvaddpd 0x123(%rax,%r14,8),%zmm29,%zmm30",}, +{{0x62, 0x61, 0x95, 0x50, 0x58, 0x31, }, 6, 0, "", "", +"62 61 95 50 58 31 \tvaddpd (%rcx){1to8},%zmm29,%zmm30",}, +{{0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x7f, }, 7, 0, "", "", +"62 61 95 40 58 72 7f \tvaddpd 0x1fc0(%rdx),%zmm29,%zmm30",}, +{{0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x7f, }, 7, 0, "", "", +"62 61 95 50 58 72 7f \tvaddpd 0x3f8(%rdx){1to8},%zmm29,%zmm30",}, +{{0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x08, }, 8, 0, "", "", +"62 f1 0c 50 c2 6a 7f 08 \tvcmpeq_uqps 0x1fc(%rdx){1to16},%zmm30,%k5",}, +{{0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01, }, 12, 0, "", "", +"62 b1 97 07 c2 ac f0 23 01 00 00 01 \tvcmpltsd 0x123(%rax,%r14,8),%xmm29,%k5{%k7}",}, +{{0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02, }, 7, 0, "", "", +"62 91 97 17 c2 ec 02 \tvcmplesd {sae},%xmm28,%xmm29,%k5{%k7}",}, +{{0x62, 0x23, 0x15, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x5b, }, 12, 0, "", "", +"62 23 15 07 27 b4 f0 23 01 00 00 5b \tvgetmantss $0x5b,0x123(%rax,%r14,8),%xmm29,%xmm30{%k7}",}, {{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", "f3 0f 1b 00 \tbndmk (%rax),%bnd0",}, {{0xf3, 0x41, 0x0f, 0x1b, 0x00, }, 5, 0, "", "", @@ -327,19 +1257,19 @@ {{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", "0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%rax,%rcx,1)",}, {{0xf2, 0xe8, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "call", "unconditional", -"f2 e8 00 00 00 00 \tbnd callq 3fb <main+0x3fb>",}, +"f2 e8 00 00 00 00 \tbnd callq f22 <main+0xf22>",}, {{0x67, 0xf2, 0xff, 0x10, }, 4, 0, "call", "indirect", "67 f2 ff 10 \tbnd callq *(%eax)",}, {{0xf2, 0xc3, }, 2, 0, "ret", "indirect", "f2 c3 \tbnd retq ",}, {{0xf2, 0xe9, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "jmp", "unconditional", -"f2 e9 00 00 00 00 \tbnd jmpq 407 <main+0x407>",}, +"f2 e9 00 00 00 00 \tbnd jmpq f2e <main+0xf2e>",}, {{0xf2, 0xe9, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "jmp", "unconditional", -"f2 e9 00 00 00 00 \tbnd jmpq 40d <main+0x40d>",}, +"f2 e9 00 00 00 00 \tbnd jmpq f34 <main+0xf34>",}, {{0x67, 0xf2, 0xff, 0x21, }, 4, 0, "jmp", "indirect", "67 f2 ff 21 \tbnd jmpq *(%ecx)",}, {{0xf2, 0x0f, 0x85, 0x00, 0x00, 0x00, 0x00, }, 7, 0, "jcc", "conditional", -"f2 0f 85 00 00 00 00 \tbnd jne 418 <main+0x418>",}, +"f2 0f 85 00 00 00 00 \tbnd jne f3f <main+0xf3f>",}, {{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "", "0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",}, {{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "", diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-src.c b/tools/perf/arch/x86/tests/insn-x86-dat-src.c index 3cd6775..76e0ec3 100644 --- a/tools/perf/arch/x86/tests/insn-x86-dat-src.c +++ b/tools/perf/arch/x86/tests/insn-x86-dat-src.c @@ -25,6 +25,876 @@ int main(void) #ifdef __x86_64__ + /* AVX-512: Instructions with the same op codes as Mask Instructions */ + + asm volatile("cmovno %rax,%rbx"); + asm volatile("cmovno 0x12345678(%rax),%rcx"); + asm volatile("cmovno 0x12345678(%rax),%cx"); + + asm volatile("cmove %rax,%rbx"); + asm volatile("cmove 0x12345678(%rax),%rcx"); + asm volatile("cmove 0x12345678(%rax),%cx"); + + asm volatile("seto 0x12345678(%rax)"); + asm volatile("setno 0x12345678(%rax)"); + asm volatile("setb 0x12345678(%rax)"); + asm volatile("setc 0x12345678(%rax)"); + asm volatile("setnae 0x12345678(%rax)"); + asm volatile("setae 0x12345678(%rax)"); + asm volatile("setnb 0x12345678(%rax)"); + asm volatile("setnc 0x12345678(%rax)"); + asm volatile("sets 0x12345678(%rax)"); + asm volatile("setns 0x12345678(%rax)"); + + /* AVX-512: Mask Instructions */ + + asm volatile("kandw %k7,%k6,%k5"); + asm volatile("kandq %k7,%k6,%k5"); + asm volatile("kandb %k7,%k6,%k5"); + asm volatile("kandd %k7,%k6,%k5"); + + asm volatile("kandnw %k7,%k6,%k5"); + asm volatile("kandnq %k7,%k6,%k5"); + asm volatile("kandnb %k7,%k6,%k5"); + asm volatile("kandnd %k7,%k6,%k5"); + + asm volatile("knotw %k7,%k6"); + asm volatile("knotq %k7,%k6"); + asm volatile("knotb %k7,%k6"); + asm volatile("knotd %k7,%k6"); + + asm volatile("korw %k7,%k6,%k5"); + asm volatile("korq %k7,%k6,%k5"); + asm volatile("korb %k7,%k6,%k5"); + asm volatile("kord %k7,%k6,%k5"); + + asm volatile("kxnorw %k7,%k6,%k5"); + asm volatile("kxnorq %k7,%k6,%k5"); + asm volatile("kxnorb %k7,%k6,%k5"); + asm volatile("kxnord %k7,%k6,%k5"); + + asm volatile("kxorw %k7,%k6,%k5"); + asm volatile("kxorq %k7,%k6,%k5"); + asm volatile("kxorb %k7,%k6,%k5"); + asm volatile("kxord %k7,%k6,%k5"); + + asm volatile("kaddw %k7,%k6,%k5"); + asm volatile("kaddq %k7,%k6,%k5"); + asm volatile("kaddb %k7,%k6,%k5"); + asm volatile("kaddd %k7,%k6,%k5"); + + asm volatile("kunpckbw %k7,%k6,%k5"); + asm volatile("kunpckwd %k7,%k6,%k5"); + asm volatile("kunpckdq %k7,%k6,%k5"); + + asm volatile("kmovw %k6,%k5"); + asm volatile("kmovw (%rcx),%k5"); + asm volatile("kmovw 0x123(%rax,%r14,8),%k5"); + asm volatile("kmovw %k5,(%rcx)"); + asm volatile("kmovw %k5,0x123(%rax,%r14,8)"); + asm volatile("kmovw %eax,%k5"); + asm volatile("kmovw %ebp,%k5"); + asm volatile("kmovw %r13d,%k5"); + asm volatile("kmovw %k5,%eax"); + asm volatile("kmovw %k5,%ebp"); + asm volatile("kmovw %k5,%r13d"); + + asm volatile("kmovq %k6,%k5"); + asm volatile("kmovq (%rcx),%k5"); + asm volatile("kmovq 0x123(%rax,%r14,8),%k5"); + asm volatile("kmovq %k5,(%rcx)"); + asm volatile("kmovq %k5,0x123(%rax,%r14,8)"); + asm volatile("kmovq %rax,%k5"); + asm volatile("kmovq %rbp,%k5"); + asm volatile("kmovq %r13,%k5"); + asm volatile("kmovq %k5,%rax"); + asm volatile("kmovq %k5,%rbp"); + asm volatile("kmovq %k5,%r13"); + + asm volatile("kmovb %k6,%k5"); + asm volatile("kmovb (%rcx),%k5"); + asm volatile("kmovb 0x123(%rax,%r14,8),%k5"); + asm volatile("kmovb %k5,(%rcx)"); + asm volatile("kmovb %k5,0x123(%rax,%r14,8)"); + asm volatile("kmovb %eax,%k5"); + asm volatile("kmovb %ebp,%k5"); + asm volatile("kmovb %r13d,%k5"); + asm volatile("kmovb %k5,%eax"); + asm volatile("kmovb %k5,%ebp"); + asm volatile("kmovb %k5,%r13d"); + + asm volatile("kmovd %k6,%k5"); + asm volatile("kmovd (%rcx),%k5"); + asm volatile("kmovd 0x123(%rax,%r14,8),%k5"); + asm volatile("kmovd %k5,(%rcx)"); + asm volatile("kmovd %k5,0x123(%rax,%r14,8)"); + asm volatile("kmovd %eax,%k5"); + asm volatile("kmovd %ebp,%k5"); + asm volatile("kmovd %r13d,%k5"); + asm volatile("kmovd %k5,%eax"); + asm volatile("kmovd %k5,%ebp"); + asm volatile("kmovd %k5,%r13d"); + + asm volatile("kortestw %k6,%k5"); + asm volatile("kortestq %k6,%k5"); + asm volatile("kortestb %k6,%k5"); + asm volatile("kortestd %k6,%k5"); + + asm volatile("ktestw %k6,%k5"); + asm volatile("ktestq %k6,%k5"); + asm volatile("ktestb %k6,%k5"); + asm volatile("ktestd %k6,%k5"); + + asm volatile("kshiftrw $0x12,%k6,%k5"); + asm volatile("kshiftrq $0x5b,%k6,%k5"); + asm volatile("kshiftlw $0x12,%k6,%k5"); + asm volatile("kshiftlq $0x5b,%k6,%k5"); + + /* AVX-512: Op code 0f 5b */ + asm volatile("vcvtdq2ps %xmm5,%xmm6"); + asm volatile("vcvtqq2ps %zmm29,%ymm6{%k7}"); + asm volatile("vcvtps2dq %xmm5,%xmm6"); + asm volatile("vcvttps2dq %xmm5,%xmm6"); + + /* AVX-512: Op code 0f 6f */ + + asm volatile("movq %mm0,%mm4"); + asm volatile("vmovdqa %ymm4,%ymm6"); + asm volatile("vmovdqa32 %zmm25,%zmm26"); + asm volatile("vmovdqa64 %zmm25,%zmm26"); + asm volatile("vmovdqu %ymm4,%ymm6"); + asm volatile("vmovdqu32 %zmm29,%zmm30"); + asm volatile("vmovdqu64 %zmm25,%zmm26"); + asm volatile("vmovdqu8 %zmm29,%zmm30"); + asm volatile("vmovdqu16 %zmm25,%zmm26"); + + /* AVX-512: Op code 0f 78 */ + + asm volatile("vmread %rax,%rbx"); + asm volatile("vcvttps2udq %zmm25,%zmm26"); + asm volatile("vcvttpd2udq %zmm29,%ymm6{%k7}"); + asm volatile("vcvttsd2usi %xmm6,%rax"); + asm volatile("vcvttss2usi %xmm6,%rax"); + asm volatile("vcvttps2uqq %ymm5,%zmm26{%k7}"); + asm volatile("vcvttpd2uqq %zmm29,%zmm30"); + + /* AVX-512: Op code 0f 79 */ + + asm volatile("vmwrite %rax,%rbx"); + asm volatile("vcvtps2udq %zmm25,%zmm26"); + asm volatile("vcvtpd2udq %zmm29,%ymm6{%k7}"); + asm volatile("vcvtsd2usi %xmm6,%rax"); + asm volatile("vcvtss2usi %xmm6,%rax"); + asm volatile("vcvtps2uqq %ymm5,%zmm26{%k7}"); + asm volatile("vcvtpd2uqq %zmm29,%zmm30"); + + /* AVX-512: Op code 0f 7a */ + + asm volatile("vcvtudq2pd %ymm5,%zmm29{%k7}"); + asm volatile("vcvtuqq2pd %zmm25,%zmm26"); + asm volatile("vcvtudq2ps %zmm29,%zmm30"); + asm volatile("vcvtuqq2ps %zmm25,%ymm26{%k7}"); + asm volatile("vcvttps2qq %ymm25,%zmm26{%k7}"); + asm volatile("vcvttpd2qq %zmm29,%zmm30"); + + /* AVX-512: Op code 0f 7b */ + + asm volatile("vcvtusi2sd %eax,%xmm5,%xmm6"); + asm volatile("vcvtusi2ss %eax,%xmm5,%xmm6"); + asm volatile("vcvtps2qq %ymm5,%zmm26{%k7}"); + asm volatile("vcvtpd2qq %zmm29,%zmm30"); + + /* AVX-512: Op code 0f 7f */ + + asm volatile("movq.s %mm0,%mm4"); + asm volatile("vmovdqa %ymm8,%ymm6"); + asm volatile("vmovdqa32.s %zmm25,%zmm26"); + asm volatile("vmovdqa64.s %zmm25,%zmm26"); + asm volatile("vmovdqu %ymm8,%ymm6"); + asm volatile("vmovdqu32.s %zmm25,%zmm26"); + asm volatile("vmovdqu64.s %zmm25,%zmm26"); + asm volatile("vmovdqu8.s %zmm30,(%rcx)"); + asm volatile("vmovdqu16.s %zmm25,%zmm26"); + + /* AVX-512: Op code 0f db */ + + asm volatile("pand %mm1,%mm2"); + asm volatile("pand %xmm1,%xmm2"); + asm volatile("vpand %ymm4,%ymm6,%ymm2"); + asm volatile("vpandd %zmm24,%zmm25,%zmm26"); + asm volatile("vpandq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f df */ + + asm volatile("pandn %mm1,%mm2"); + asm volatile("pandn %xmm1,%xmm2"); + asm volatile("vpandn %ymm4,%ymm6,%ymm2"); + asm volatile("vpandnd %zmm24,%zmm25,%zmm26"); + asm volatile("vpandnq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f e6 */ + + asm volatile("vcvttpd2dq %xmm1,%xmm2"); + asm volatile("vcvtdq2pd %xmm5,%xmm6"); + asm volatile("vcvtdq2pd %ymm5,%zmm26{%k7}"); + asm volatile("vcvtqq2pd %zmm25,%zmm26"); + asm volatile("vcvtpd2dq %xmm1,%xmm2"); + + /* AVX-512: Op code 0f eb */ + + asm volatile("por %mm4,%mm6"); + asm volatile("vpor %ymm4,%ymm6,%ymm2"); + asm volatile("vpord %zmm24,%zmm25,%zmm26"); + asm volatile("vporq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f ef */ + + asm volatile("pxor %mm4,%mm6"); + asm volatile("vpxor %ymm4,%ymm6,%ymm2"); + asm volatile("vpxord %zmm24,%zmm25,%zmm26"); + asm volatile("vpxorq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 10 */ + + asm volatile("pblendvb %xmm1,%xmm0"); + asm volatile("vpsrlvw %zmm27,%zmm28,%zmm29"); + asm volatile("vpmovuswb %zmm28,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 11 */ + + asm volatile("vpmovusdb %zmm28,%xmm6{%k7}"); + asm volatile("vpsravw %zmm27,%zmm28,%zmm29"); + + /* AVX-512: Op code 0f 38 12 */ + + asm volatile("vpmovusqb %zmm27,%xmm6{%k7}"); + asm volatile("vpsllvw %zmm27,%zmm28,%zmm29"); + + /* AVX-512: Op code 0f 38 13 */ + + asm volatile("vcvtph2ps %xmm3,%ymm5"); + asm volatile("vcvtph2ps %ymm5,%zmm27{%k7}"); + asm volatile("vpmovusdw %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 14 */ + + asm volatile("blendvps %xmm1,%xmm0"); + asm volatile("vpmovusqw %zmm27,%xmm6{%k7}"); + asm volatile("vprorvd %zmm27,%zmm28,%zmm29"); + asm volatile("vprorvq %zmm27,%zmm28,%zmm29"); + + /* AVX-512: Op code 0f 38 15 */ + + asm volatile("blendvpd %xmm1,%xmm0"); + asm volatile("vpmovusqd %zmm27,%ymm6{%k7}"); + asm volatile("vprolvd %zmm27,%zmm28,%zmm29"); + asm volatile("vprolvq %zmm27,%zmm28,%zmm29"); + + /* AVX-512: Op code 0f 38 16 */ + + asm volatile("vpermps %ymm4,%ymm6,%ymm2"); + asm volatile("vpermps %ymm24,%ymm26,%ymm22{%k7}"); + asm volatile("vpermpd %ymm24,%ymm26,%ymm22{%k7}"); + + /* AVX-512: Op code 0f 38 19 */ + + asm volatile("vbroadcastsd %xmm4,%ymm6"); + asm volatile("vbroadcastf32x2 %xmm27,%zmm26"); + + /* AVX-512: Op code 0f 38 1a */ + + asm volatile("vbroadcastf128 (%rcx),%ymm4"); + asm volatile("vbroadcastf32x4 (%rcx),%zmm26"); + asm volatile("vbroadcastf64x2 (%rcx),%zmm26"); + + /* AVX-512: Op code 0f 38 1b */ + + asm volatile("vbroadcastf32x8 (%rcx),%zmm27"); + asm volatile("vbroadcastf64x4 (%rcx),%zmm26"); + + /* AVX-512: Op code 0f 38 1f */ + + asm volatile("vpabsq %zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 20 */ + + asm volatile("vpmovsxbw %xmm4,%xmm5"); + asm volatile("vpmovswb %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 21 */ + + asm volatile("vpmovsxbd %xmm4,%ymm6"); + asm volatile("vpmovsdb %zmm27,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 22 */ + + asm volatile("vpmovsxbq %xmm4,%ymm4"); + asm volatile("vpmovsqb %zmm27,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 23 */ + + asm volatile("vpmovsxwd %xmm4,%ymm4"); + asm volatile("vpmovsdw %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 24 */ + + asm volatile("vpmovsxwq %xmm4,%ymm6"); + asm volatile("vpmovsqw %zmm27,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 25 */ + + asm volatile("vpmovsxdq %xmm4,%ymm4"); + asm volatile("vpmovsqd %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 26 */ + + asm volatile("vptestmb %zmm27,%zmm28,%k5"); + asm volatile("vptestmw %zmm27,%zmm28,%k5"); + asm volatile("vptestnmb %zmm26,%zmm27,%k5"); + asm volatile("vptestnmw %zmm26,%zmm27,%k5"); + + /* AVX-512: Op code 0f 38 27 */ + + asm volatile("vptestmd %zmm27,%zmm28,%k5"); + asm volatile("vptestmq %zmm27,%zmm28,%k5"); + asm volatile("vptestnmd %zmm26,%zmm27,%k5"); + asm volatile("vptestnmq %zmm26,%zmm27,%k5"); + + /* AVX-512: Op code 0f 38 28 */ + + asm volatile("vpmuldq %ymm4,%ymm6,%ymm2"); + asm volatile("vpmovm2b %k5,%zmm28"); + asm volatile("vpmovm2w %k5,%zmm28"); + + /* AVX-512: Op code 0f 38 29 */ + + asm volatile("vpcmpeqq %ymm4,%ymm6,%ymm2"); + asm volatile("vpmovb2m %zmm28,%k5"); + asm volatile("vpmovw2m %zmm28,%k5"); + + /* AVX-512: Op code 0f 38 2a */ + + asm volatile("vmovntdqa (%rcx),%ymm4"); + asm volatile("vpbroadcastmb2q %k6,%zmm30"); + + /* AVX-512: Op code 0f 38 2c */ + + asm volatile("vmaskmovps (%rcx),%ymm4,%ymm6"); + asm volatile("vscalefps %zmm24,%zmm25,%zmm26"); + asm volatile("vscalefpd %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 2d */ + + asm volatile("vmaskmovpd (%rcx),%ymm4,%ymm6"); + asm volatile("vscalefss %xmm24,%xmm25,%xmm26{%k7}"); + asm volatile("vscalefsd %xmm24,%xmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 38 30 */ + + asm volatile("vpmovzxbw %xmm4,%ymm4"); + asm volatile("vpmovwb %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 31 */ + + asm volatile("vpmovzxbd %xmm4,%ymm6"); + asm volatile("vpmovdb %zmm27,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 32 */ + + asm volatile("vpmovzxbq %xmm4,%ymm4"); + asm volatile("vpmovqb %zmm27,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 33 */ + + asm volatile("vpmovzxwd %xmm4,%ymm4"); + asm volatile("vpmovdw %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 34 */ + + asm volatile("vpmovzxwq %xmm4,%ymm6"); + asm volatile("vpmovqw %zmm27,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 35 */ + + asm volatile("vpmovzxdq %xmm4,%ymm4"); + asm volatile("vpmovqd %zmm27,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 38 */ + + asm volatile("vpermd %ymm4,%ymm6,%ymm2"); + asm volatile("vpermd %ymm24,%ymm26,%ymm22{%k7}"); + asm volatile("vpermq %ymm24,%ymm26,%ymm22{%k7}"); + + /* AVX-512: Op code 0f 38 38 */ + + asm volatile("vpminsb %ymm4,%ymm6,%ymm2"); + asm volatile("vpmovm2d %k5,%zmm28"); + asm volatile("vpmovm2q %k5,%zmm28"); + + /* AVX-512: Op code 0f 38 39 */ + + asm volatile("vpminsd %xmm1,%xmm2,%xmm3"); + asm volatile("vpminsd %zmm24,%zmm25,%zmm26"); + asm volatile("vpminsq %zmm24,%zmm25,%zmm26"); + asm volatile("vpmovd2m %zmm28,%k5"); + asm volatile("vpmovq2m %zmm28,%k5"); + + /* AVX-512: Op code 0f 38 3a */ + + asm volatile("vpminuw %ymm4,%ymm6,%ymm2"); + asm volatile("vpbroadcastmw2d %k6,%zmm28"); + + /* AVX-512: Op code 0f 38 3b */ + + asm volatile("vpminud %ymm4,%ymm6,%ymm2"); + asm volatile("vpminud %zmm24,%zmm25,%zmm26"); + asm volatile("vpminuq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 3d */ + + asm volatile("vpmaxsd %ymm4,%ymm6,%ymm2"); + asm volatile("vpmaxsd %zmm24,%zmm25,%zmm26"); + asm volatile("vpmaxsq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 3f */ + + asm volatile("vpmaxud %ymm4,%ymm6,%ymm2"); + asm volatile("vpmaxud %zmm24,%zmm25,%zmm26"); + asm volatile("vpmaxuq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 42 */ + + asm volatile("vpmulld %ymm4,%ymm6,%ymm2"); + asm volatile("vpmulld %zmm24,%zmm25,%zmm26"); + asm volatile("vpmullq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 42 */ + + asm volatile("vgetexpps %zmm25,%zmm26"); + asm volatile("vgetexppd %zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 43 */ + + asm volatile("vgetexpss %xmm24,%xmm25,%xmm26{%k7}"); + asm volatile("vgetexpsd %xmm28,%xmm29,%xmm30{%k7}"); + + /* AVX-512: Op code 0f 38 44 */ + + asm volatile("vplzcntd %zmm27,%zmm28"); + asm volatile("vplzcntq %zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 46 */ + + asm volatile("vpsravd %ymm4,%ymm6,%ymm2"); + asm volatile("vpsravd %zmm24,%zmm25,%zmm26"); + asm volatile("vpsravq %zmm24,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 38 4c */ + + asm volatile("vrcp14ps %zmm25,%zmm26"); + asm volatile("vrcp14pd %zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 4d */ + + asm volatile("vrcp14ss %xmm24,%xmm25,%xmm26{%k7}"); + asm volatile("vrcp14sd %xmm24,%xmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 38 4e */ + + asm volatile("vrsqrt14ps %zmm25,%zmm26"); + asm volatile("vrsqrt14pd %zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 4f */ + + asm volatile("vrsqrt14ss %xmm24,%xmm25,%xmm26{%k7}"); + asm volatile("vrsqrt14sd %xmm24,%xmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 38 59 */ + + asm volatile("vpbroadcastq %xmm4,%xmm6"); + asm volatile("vbroadcasti32x2 %xmm27,%zmm26"); + + /* AVX-512: Op code 0f 38 5a */ + + asm volatile("vbroadcasti128 (%rcx),%ymm4"); + asm volatile("vbroadcasti32x4 (%rcx),%zmm26"); + asm volatile("vbroadcasti64x2 (%rcx),%zmm26"); + + /* AVX-512: Op code 0f 38 5b */ + + asm volatile("vbroadcasti32x8 (%rcx),%zmm28"); + asm volatile("vbroadcasti64x4 (%rcx),%zmm26"); + + /* AVX-512: Op code 0f 38 64 */ + + asm volatile("vpblendmd %zmm26,%zmm27,%zmm28"); + asm volatile("vpblendmq %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 65 */ + + asm volatile("vblendmps %zmm24,%zmm25,%zmm26"); + asm volatile("vblendmpd %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 66 */ + + asm volatile("vpblendmb %zmm26,%zmm27,%zmm28"); + asm volatile("vpblendmw %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 75 */ + + asm volatile("vpermi2b %zmm24,%zmm25,%zmm26"); + asm volatile("vpermi2w %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 76 */ + + asm volatile("vpermi2d %zmm26,%zmm27,%zmm28"); + asm volatile("vpermi2q %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 77 */ + + asm volatile("vpermi2ps %zmm26,%zmm27,%zmm28"); + asm volatile("vpermi2pd %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 7a */ + + asm volatile("vpbroadcastb %eax,%xmm30"); + + /* AVX-512: Op code 0f 38 7b */ + + asm volatile("vpbroadcastw %eax,%xmm30"); + + /* AVX-512: Op code 0f 38 7c */ + + asm volatile("vpbroadcastd %eax,%xmm30"); + asm volatile("vpbroadcastq %rax,%zmm30"); + + /* AVX-512: Op code 0f 38 7d */ + + asm volatile("vpermt2b %zmm26,%zmm27,%zmm28"); + asm volatile("vpermt2w %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 7e */ + + asm volatile("vpermt2d %zmm26,%zmm27,%zmm28"); + asm volatile("vpermt2q %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 7f */ + + asm volatile("vpermt2ps %zmm26,%zmm27,%zmm28"); + asm volatile("vpermt2pd %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 83 */ + + asm volatile("vpmultishiftqb %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 88 */ + + asm volatile("vexpandps (%rcx),%zmm26"); + asm volatile("vexpandpd (%rcx),%zmm28"); + + /* AVX-512: Op code 0f 38 89 */ + + asm volatile("vpexpandd (%rcx),%zmm28"); + asm volatile("vpexpandq (%rcx),%zmm26"); + + /* AVX-512: Op code 0f 38 8a */ + + asm volatile("vcompressps %zmm28,(%rcx)"); + asm volatile("vcompresspd %zmm28,(%rcx)"); + + /* AVX-512: Op code 0f 38 8b */ + + asm volatile("vpcompressd %zmm28,(%rcx)"); + asm volatile("vpcompressq %zmm26,(%rcx)"); + + /* AVX-512: Op code 0f 38 8d */ + + asm volatile("vpermb %zmm26,%zmm27,%zmm28"); + asm volatile("vpermw %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 90 */ + + asm volatile("vpgatherdd %xmm2,0x02(%rbp,%xmm7,2),%xmm1"); + asm volatile("vpgatherdq %xmm2,0x04(%rbp,%xmm7,2),%xmm1"); + asm volatile("vpgatherdd 0x7b(%rbp,%zmm27,8),%zmm26{%k1}"); + asm volatile("vpgatherdq 0x7b(%rbp,%ymm27,8),%zmm26{%k1}"); + + /* AVX-512: Op code 0f 38 91 */ + + asm volatile("vpgatherqd %xmm2,0x02(%rbp,%xmm7,2),%xmm1"); + asm volatile("vpgatherqq %xmm2,0x02(%rbp,%xmm7,2),%xmm1"); + asm volatile("vpgatherqd 0x7b(%rbp,%zmm27,8),%ymm26{%k1}"); + asm volatile("vpgatherqq 0x7b(%rbp,%zmm27,8),%zmm26{%k1}"); + + /* AVX-512: Op code 0f 38 a0 */ + + asm volatile("vpscatterdd %zmm28,0x7b(%rbp,%zmm29,8){%k1}"); + asm volatile("vpscatterdq %zmm26,0x7b(%rbp,%ymm27,8){%k1}"); + + /* AVX-512: Op code 0f 38 a1 */ + + asm volatile("vpscatterqd %ymm6,0x7b(%rbp,%zmm29,8){%k1}"); + asm volatile("vpscatterqq %ymm6,0x7b(%rbp,%ymm27,8){%k1}"); + + /* AVX-512: Op code 0f 38 a2 */ + + asm volatile("vscatterdps %zmm28,0x7b(%rbp,%zmm29,8){%k1}"); + asm volatile("vscatterdpd %zmm28,0x7b(%rbp,%ymm27,8){%k1}"); + + /* AVX-512: Op code 0f 38 a3 */ + + asm volatile("vscatterqps %ymm6,0x7b(%rbp,%zmm29,8){%k1}"); + asm volatile("vscatterqpd %zmm28,0x7b(%rbp,%zmm29,8){%k1}"); + + /* AVX-512: Op code 0f 38 b4 */ + + asm volatile("vpmadd52luq %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 b5 */ + + asm volatile("vpmadd52huq %zmm26,%zmm27,%zmm28"); + + /* AVX-512: Op code 0f 38 c4 */ + + asm volatile("vpconflictd %zmm26,%zmm27"); + asm volatile("vpconflictq %zmm26,%zmm27"); + + /* AVX-512: Op code 0f 38 c8 */ + + asm volatile("vexp2ps %zmm29,%zmm30"); + asm volatile("vexp2pd %zmm26,%zmm27"); + + /* AVX-512: Op code 0f 38 ca */ + + asm volatile("vrcp28ps %zmm29,%zmm30"); + asm volatile("vrcp28pd %zmm26,%zmm27"); + + /* AVX-512: Op code 0f 38 cb */ + + asm volatile("vrcp28ss %xmm28,%xmm29,%xmm30{%k7}"); + asm volatile("vrcp28sd %xmm25,%xmm26,%xmm27{%k7}"); + + /* AVX-512: Op code 0f 38 cc */ + + asm volatile("vrsqrt28ps %zmm29,%zmm30"); + asm volatile("vrsqrt28pd %zmm26,%zmm27"); + + /* AVX-512: Op code 0f 38 cd */ + + asm volatile("vrsqrt28ss %xmm28,%xmm29,%xmm30{%k7}"); + asm volatile("vrsqrt28sd %xmm25,%xmm26,%xmm27{%k7}"); + + /* AVX-512: Op code 0f 3a 03 */ + + asm volatile("valignd $0x12,%zmm28,%zmm29,%zmm30"); + asm volatile("valignq $0x12,%zmm25,%zmm26,%zmm27"); + + /* AVX-512: Op code 0f 3a 08 */ + + asm volatile("vroundps $0x5,%ymm6,%ymm2"); + asm volatile("vrndscaleps $0x12,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 3a 09 */ + + asm volatile("vroundpd $0x5,%ymm6,%ymm2"); + asm volatile("vrndscalepd $0x12,%zmm25,%zmm26"); + + /* AVX-512: Op code 0f 3a 1a */ + + asm volatile("vroundss $0x5,%xmm4,%xmm6,%xmm2"); + asm volatile("vrndscaless $0x12,%xmm24,%xmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 3a 0b */ + + asm volatile("vroundsd $0x5,%xmm4,%xmm6,%xmm2"); + asm volatile("vrndscalesd $0x12,%xmm24,%xmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 3a 18 */ + + asm volatile("vinsertf128 $0x5,%xmm4,%ymm4,%ymm6"); + asm volatile("vinsertf32x4 $0x12,%xmm24,%zmm25,%zmm26{%k7}"); + asm volatile("vinsertf64x2 $0x12,%xmm24,%zmm25,%zmm26{%k7}"); + + /* AVX-512: Op code 0f 3a 19 */ + + asm volatile("vextractf128 $0x5,%ymm4,%xmm4"); + asm volatile("vextractf32x4 $0x12,%zmm25,%xmm26{%k7}"); + asm volatile("vextractf64x2 $0x12,%zmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 3a 1a */ + + asm volatile("vinsertf32x8 $0x12,%ymm25,%zmm26,%zmm27{%k7}"); + asm volatile("vinsertf64x4 $0x12,%ymm28,%zmm29,%zmm30{%k7}"); + + /* AVX-512: Op code 0f 3a 1b */ + + asm volatile("vextractf32x8 $0x12,%zmm29,%ymm30{%k7}"); + asm volatile("vextractf64x4 $0x12,%zmm26,%ymm27{%k7}"); + + /* AVX-512: Op code 0f 3a 1e */ + + asm volatile("vpcmpud $0x12,%zmm29,%zmm30,%k5"); + asm volatile("vpcmpuq $0x12,%zmm26,%zmm27,%k5"); + + /* AVX-512: Op code 0f 3a 1f */ + + asm volatile("vpcmpd $0x12,%zmm29,%zmm30,%k5"); + asm volatile("vpcmpq $0x12,%zmm26,%zmm27,%k5"); + + /* AVX-512: Op code 0f 3a 23 */ + + asm volatile("vshuff32x4 $0x12,%zmm28,%zmm29,%zmm30"); + asm volatile("vshuff64x2 $0x12,%zmm25,%zmm26,%zmm27"); + + /* AVX-512: Op code 0f 3a 25 */ + + asm volatile("vpternlogd $0x12,%zmm28,%zmm29,%zmm30"); + asm volatile("vpternlogq $0x12,%zmm28,%zmm29,%zmm30"); + + /* AVX-512: Op code 0f 3a 26 */ + + asm volatile("vgetmantps $0x12,%zmm26,%zmm27"); + asm volatile("vgetmantpd $0x12,%zmm29,%zmm30"); + + /* AVX-512: Op code 0f 3a 27 */ + + asm volatile("vgetmantss $0x12,%xmm25,%xmm26,%xmm27{%k7}"); + asm volatile("vgetmantsd $0x12,%xmm28,%xmm29,%xmm30{%k7}"); + + /* AVX-512: Op code 0f 3a 38 */ + + asm volatile("vinserti128 $0x5,%xmm4,%ymm4,%ymm6"); + asm volatile("vinserti32x4 $0x12,%xmm24,%zmm25,%zmm26{%k7}"); + asm volatile("vinserti64x2 $0x12,%xmm24,%zmm25,%zmm26{%k7}"); + + /* AVX-512: Op code 0f 3a 39 */ + + asm volatile("vextracti128 $0x5,%ymm4,%xmm6"); + asm volatile("vextracti32x4 $0x12,%zmm25,%xmm26{%k7}"); + asm volatile("vextracti64x2 $0x12,%zmm25,%xmm26{%k7}"); + + /* AVX-512: Op code 0f 3a 3a */ + + asm volatile("vinserti32x8 $0x12,%ymm28,%zmm29,%zmm30{%k7}"); + asm volatile("vinserti64x4 $0x12,%ymm25,%zmm26,%zmm27{%k7}"); + + /* AVX-512: Op code 0f 3a 3b */ + + asm volatile("vextracti32x8 $0x12,%zmm29,%ymm30{%k7}"); + asm volatile("vextracti64x4 $0x12,%zmm26,%ymm27{%k7}"); + + /* AVX-512: Op code 0f 3a 3e */ + + asm volatile("vpcmpub $0x12,%zmm29,%zmm30,%k5"); + asm volatile("vpcmpuw $0x12,%zmm26,%zmm27,%k5"); + + /* AVX-512: Op code 0f 3a 3f */ + + asm volatile("vpcmpb $0x12,%zmm29,%zmm30,%k5"); + asm volatile("vpcmpw $0x12,%zmm26,%zmm27,%k5"); + + /* AVX-512: Op code 0f 3a 43 */ + + asm volatile("vmpsadbw $0x5,%ymm4,%ymm6,%ymm2"); + asm volatile("vdbpsadbw $0x12,%zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 3a 43 */ + + asm volatile("vshufi32x4 $0x12,%zmm25,%zmm26,%zmm27"); + asm volatile("vshufi64x2 $0x12,%zmm28,%zmm29,%zmm30"); + + /* AVX-512: Op code 0f 3a 50 */ + + asm volatile("vrangeps $0x12,%zmm25,%zmm26,%zmm27"); + asm volatile("vrangepd $0x12,%zmm28,%zmm29,%zmm30"); + + /* AVX-512: Op code 0f 3a 51 */ + + asm volatile("vrangess $0x12,%xmm25,%xmm26,%xmm27"); + asm volatile("vrangesd $0x12,%xmm28,%xmm29,%xmm30"); + + /* AVX-512: Op code 0f 3a 54 */ + + asm volatile("vfixupimmps $0x12,%zmm28,%zmm29,%zmm30"); + asm volatile("vfixupimmpd $0x12,%zmm25,%zmm26,%zmm27"); + + /* AVX-512: Op code 0f 3a 55 */ + + asm volatile("vfixupimmss $0x12,%xmm28,%xmm29,%xmm30{%k7}"); + asm volatile("vfixupimmsd $0x12,%xmm25,%xmm26,%xmm27{%k7}"); + + /* AVX-512: Op code 0f 3a 56 */ + + asm volatile("vreduceps $0x12,%zmm26,%zmm27"); + asm volatile("vreducepd $0x12,%zmm29,%zmm30"); + + /* AVX-512: Op code 0f 3a 57 */ + + asm volatile("vreducess $0x12,%xmm25,%xmm26,%xmm27"); + asm volatile("vreducesd $0x12,%xmm28,%xmm29,%xmm30"); + + /* AVX-512: Op code 0f 3a 66 */ + + asm volatile("vfpclassps $0x12,%zmm27,%k5"); + asm volatile("vfpclasspd $0x12,%zmm30,%k5"); + + /* AVX-512: Op code 0f 3a 67 */ + + asm volatile("vfpclassss $0x12,%xmm27,%k5"); + asm volatile("vfpclasssd $0x12,%xmm30,%k5"); + + /* AVX-512: Op code 0f 72 (Grp13) */ + + asm volatile("vprord $0x12,%zmm25,%zmm26"); + asm volatile("vprorq $0x12,%zmm25,%zmm26"); + asm volatile("vprold $0x12,%zmm29,%zmm30"); + asm volatile("vprolq $0x12,%zmm29,%zmm30"); + asm volatile("psrad $0x2,%mm6"); + asm volatile("vpsrad $0x5,%ymm6,%ymm2"); + asm volatile("vpsrad $0x5,%zmm26,%zmm22"); + asm volatile("vpsraq $0x5,%zmm26,%zmm22"); + + /* AVX-512: Op code 0f 38 c6 (Grp18) */ + + asm volatile("vgatherpf0dps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vgatherpf0dpd 0x7b(%r14,%ymm31,8){%k1}"); + asm volatile("vgatherpf1dps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vgatherpf1dpd 0x7b(%r14,%ymm31,8){%k1}"); + asm volatile("vscatterpf0dps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vscatterpf0dpd 0x7b(%r14,%ymm31,8){%k1}"); + asm volatile("vscatterpf1dps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vscatterpf1dpd 0x7b(%r14,%ymm31,8){%k1}"); + + /* AVX-512: Op code 0f 38 c7 (Grp19) */ + + asm volatile("vgatherpf0qps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vgatherpf0qpd 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vgatherpf1qps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vgatherpf1qpd 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vscatterpf0qps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vscatterpf0qpd 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vscatterpf1qps 0x7b(%r14,%zmm31,8){%k1}"); + asm volatile("vscatterpf1qpd 0x7b(%r14,%zmm31,8){%k1}"); + + /* AVX-512: Examples */ + + asm volatile("vaddpd %zmm28,%zmm29,%zmm30"); + asm volatile("vaddpd %zmm28,%zmm29,%zmm30{%k7}"); + asm volatile("vaddpd %zmm28,%zmm29,%zmm30{%k7}{z}"); + asm volatile("vaddpd {rn-sae},%zmm28,%zmm29,%zmm30"); + asm volatile("vaddpd {ru-sae},%zmm28,%zmm29,%zmm30"); + asm volatile("vaddpd {rd-sae},%zmm28,%zmm29,%zmm30"); + asm volatile("vaddpd {rz-sae},%zmm28,%zmm29,%zmm30"); + asm volatile("vaddpd (%rcx),%zmm29,%zmm30"); + asm volatile("vaddpd 0x123(%rax,%r14,8),%zmm29,%zmm30"); + asm volatile("vaddpd (%rcx){1to8},%zmm29,%zmm30"); + asm volatile("vaddpd 0x1fc0(%rdx),%zmm29,%zmm30"); + asm volatile("vaddpd 0x3f8(%rdx){1to8},%zmm29,%zmm30"); + asm volatile("vcmpeq_uqps 0x1fc(%rdx){1to16},%zmm30,%k5"); + asm volatile("vcmpltsd 0x123(%rax,%r14,8),%xmm29,%k5{%k7}"); + asm volatile("vcmplesd {sae},%xmm28,%xmm29,%k5{%k7}"); + asm volatile("vgetmantss $0x5b,0x123(%rax,%r14,8),%xmm29,%xmm30{%k7}"); + /* bndmk m64, bnd */ asm volatile("bndmk (%rax), %bnd0"); @@ -475,6 +1345,921 @@ int main(void) #else /* #ifdef __x86_64__ */ + /* bound r32, mem (same op code as EVEX prefix) */ + + asm volatile("bound %eax, 0x12345678(%ecx)"); + asm volatile("bound %ecx, 0x12345678(%eax)"); + asm volatile("bound %edx, 0x12345678(%eax)"); + asm volatile("bound %ebx, 0x12345678(%eax)"); + asm volatile("bound %esp, 0x12345678(%eax)"); + asm volatile("bound %ebp, 0x12345678(%eax)"); + asm volatile("bound %esi, 0x12345678(%eax)"); + asm volatile("bound %edi, 0x12345678(%eax)"); + asm volatile("bound %ecx, (%eax)"); + asm volatile("bound %eax, (0x12345678)"); + asm volatile("bound %edx, (%ecx,%eax,1)"); + asm volatile("bound %edx, 0x12345678(,%eax,1)"); + asm volatile("bound %edx, (%eax,%ecx,1)"); + asm volatile("bound %edx, (%eax,%ecx,8)"); + asm volatile("bound %edx, 0x12(%eax)"); + asm volatile("bound %edx, 0x12(%ebp)"); + asm volatile("bound %edx, 0x12(%ecx,%eax,1)"); + asm volatile("bound %edx, 0x12(%ebp,%eax,1)"); + asm volatile("bound %edx, 0x12(%eax,%ecx,1)"); + asm volatile("bound %edx, 0x12(%eax,%ecx,8)"); + asm volatile("bound %edx, 0x12345678(%eax)"); + asm volatile("bound %edx, 0x12345678(%ebp)"); + asm volatile("bound %edx, 0x12345678(%ecx,%eax,1)"); + asm volatile("bound %edx, 0x12345678(%ebp,%eax,1)"); + asm volatile("bound %edx, 0x12345678(%eax,%ecx,1)"); + asm volatile("bound %edx, 0x12345678(%eax,%ecx,8)"); + + /* bound r16, mem (same op code as EVEX prefix) */ + + asm volatile("bound %ax, 0x12345678(%ecx)"); + asm volatile("bound %cx, 0x12345678(%eax)"); + asm volatile("bound %dx, 0x12345678(%eax)"); + asm volatile("bound %bx, 0x12345678(%eax)"); + asm volatile("bound %sp, 0x12345678(%eax)"); + asm volatile("bound %bp, 0x12345678(%eax)"); + asm volatile("bound %si, 0x12345678(%eax)"); + asm volatile("bound %di, 0x12345678(%eax)"); + asm volatile("bound %cx, (%eax)"); + asm volatile("bound %ax, (0x12345678)"); + asm volatile("bound %dx, (%ecx,%eax,1)"); + asm volatile("bound %dx, 0x12345678(,%eax,1)"); + asm volatile("bound %dx, (%eax,%ecx,1)"); + asm volatile("bound %dx, (%eax,%ecx,8)"); + asm volatile("bound %dx, 0x12(%eax)"); + asm volatile("bound %dx, 0x12(%ebp)"); + asm volatile("bound %dx, 0x12(%ecx,%eax,1)"); + asm volatile("bound %dx, 0x12(%ebp,%eax,1)"); + asm volatile("bound %dx, 0x12(%eax,%ecx,1)"); + asm volatile("bound %dx, 0x12(%eax,%ecx,8)"); + asm volatile("bound %dx, 0x12345678(%eax)"); + asm volatile("bound %dx, 0x12345678(%ebp)"); + asm volatile("bound %dx, 0x12345678(%ecx,%eax,1)"); + asm volatile("bound %dx, 0x12345678(%ebp,%eax,1)"); + asm volatile("bound %dx, 0x12345678(%eax,%ecx,1)"); + asm volatile("bound %dx, 0x12345678(%eax,%ecx,8)"); + + /* AVX-512: Instructions with the same op codes as Mask Instructions */ + + asm volatile("cmovno %eax,%ebx"); + asm volatile("cmovno 0x12345678(%eax),%ecx"); + asm volatile("cmovno 0x12345678(%eax),%cx"); + + asm volatile("cmove %eax,%ebx"); + asm volatile("cmove 0x12345678(%eax),%ecx"); + asm volatile("cmove 0x12345678(%eax),%cx"); + + asm volatile("seto 0x12345678(%eax)"); + asm volatile("setno 0x12345678(%eax)"); + asm volatile("setb 0x12345678(%eax)"); + asm volatile("setc 0x12345678(%eax)"); + asm volatile("setnae 0x12345678(%eax)"); + asm volatile("setae 0x12345678(%eax)"); + asm volatile("setnb 0x12345678(%eax)"); + asm volatile("setnc 0x12345678(%eax)"); + asm volatile("sets 0x12345678(%eax)"); + asm volatile("setns 0x12345678(%eax)"); + + /* AVX-512: Mask Instructions */ + + asm volatile("kandw %k7,%k6,%k5"); + asm volatile("kandq %k7,%k6,%k5"); + asm volatile("kandb %k7,%k6,%k5"); + asm volatile("kandd %k7,%k6,%k5"); + + asm volatile("kandnw %k7,%k6,%k5"); + asm volatile("kandnq %k7,%k6,%k5"); + asm volatile("kandnb %k7,%k6,%k5"); + asm volatile("kandnd %k7,%k6,%k5"); + + asm volatile("knotw %k7,%k6"); + asm volatile("knotq %k7,%k6"); + asm volatile("knotb %k7,%k6"); + asm volatile("knotd %k7,%k6"); + + asm volatile("korw %k7,%k6,%k5"); + asm volatile("korq %k7,%k6,%k5"); + asm volatile("korb %k7,%k6,%k5"); + asm volatile("kord %k7,%k6,%k5"); + + asm volatile("kxnorw %k7,%k6,%k5"); + asm volatile("kxnorq %k7,%k6,%k5"); + asm volatile("kxnorb %k7,%k6,%k5"); + asm volatile("kxnord %k7,%k6,%k5"); + + asm volatile("kxorw %k7,%k6,%k5"); + asm volatile("kxorq %k7,%k6,%k5"); + asm volatile("kxorb %k7,%k6,%k5"); + asm volatile("kxord %k7,%k6,%k5"); + + asm volatile("kaddw %k7,%k6,%k5"); + asm volatile("kaddq %k7,%k6,%k5"); + asm volatile("kaddb %k7,%k6,%k5"); + asm volatile("kaddd %k7,%k6,%k5"); + + asm volatile("kunpckbw %k7,%k6,%k5"); + asm volatile("kunpckwd %k7,%k6,%k5"); + asm volatile("kunpckdq %k7,%k6,%k5"); + + asm volatile("kmovw %k6,%k5"); + asm volatile("kmovw (%ecx),%k5"); + asm volatile("kmovw 0x123(%eax,%ecx,8),%k5"); + asm volatile("kmovw %k5,(%ecx)"); + asm volatile("kmovw %k5,0x123(%eax,%ecx,8)"); + asm volatile("kmovw %eax,%k5"); + asm volatile("kmovw %ebp,%k5"); + asm volatile("kmovw %k5,%eax"); + asm volatile("kmovw %k5,%ebp"); + + asm volatile("kmovq %k6,%k5"); + asm volatile("kmovq (%ecx),%k5"); + asm volatile("kmovq 0x123(%eax,%ecx,8),%k5"); + asm volatile("kmovq %k5,(%ecx)"); + asm volatile("kmovq %k5,0x123(%eax,%ecx,8)"); + + asm volatile("kmovb %k6,%k5"); + asm volatile("kmovb (%ecx),%k5"); + asm volatile("kmovb 0x123(%eax,%ecx,8),%k5"); + asm volatile("kmovb %k5,(%ecx)"); + asm volatile("kmovb %k5,0x123(%eax,%ecx,8)"); + asm volatile("kmovb %eax,%k5"); + asm volatile("kmovb %ebp,%k5"); + asm volatile("kmovb %k5,%eax"); + asm volatile("kmovb %k5,%ebp"); + + asm volatile("kmovd %k6,%k5"); + asm volatile("kmovd (%ecx),%k5"); + asm volatile("kmovd 0x123(%eax,%ecx,8),%k5"); + asm volatile("kmovd %k5,(%ecx)"); + asm volatile("kmovd %k5,0x123(%eax,%ecx,8)"); + asm volatile("kmovd %eax,%k5"); + asm volatile("kmovd %ebp,%k5"); + asm volatile("kmovd %k5,%eax"); + asm volatile("kmovd %k5,%ebp"); + + asm volatile("kortestw %k6,%k5"); + asm volatile("kortestq %k6,%k5"); + asm volatile("kortestb %k6,%k5"); + asm volatile("kortestd %k6,%k5"); + + asm volatile("ktestw %k6,%k5"); + asm volatile("ktestq %k6,%k5"); + asm volatile("ktestb %k6,%k5"); + asm volatile("ktestd %k6,%k5"); + + asm volatile("kshiftrw $0x12,%k6,%k5"); + asm volatile("kshiftrq $0x5b,%k6,%k5"); + asm volatile("kshiftlw $0x12,%k6,%k5"); + asm volatile("kshiftlq $0x5b,%k6,%k5"); + + /* AVX-512: Op code 0f 5b */ + asm volatile("vcvtdq2ps %xmm5,%xmm6"); + asm volatile("vcvtqq2ps %zmm5,%ymm6{%k7}"); + asm volatile("vcvtps2dq %xmm5,%xmm6"); + asm volatile("vcvttps2dq %xmm5,%xmm6"); + + /* AVX-512: Op code 0f 6f */ + + asm volatile("movq %mm0,%mm4"); + asm volatile("vmovdqa %ymm4,%ymm6"); + asm volatile("vmovdqa32 %zmm5,%zmm6"); + asm volatile("vmovdqa64 %zmm5,%zmm6"); + asm volatile("vmovdqu %ymm4,%ymm6"); + asm volatile("vmovdqu32 %zmm5,%zmm6"); + asm volatile("vmovdqu64 %zmm5,%zmm6"); + asm volatile("vmovdqu8 %zmm5,%zmm6"); + asm volatile("vmovdqu16 %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 78 */ + + asm volatile("vmread %eax,%ebx"); + asm volatile("vcvttps2udq %zmm5,%zmm6"); + asm volatile("vcvttpd2udq %zmm5,%ymm6{%k7}"); + asm volatile("vcvttsd2usi %xmm6,%eax"); + asm volatile("vcvttss2usi %xmm6,%eax"); + asm volatile("vcvttps2uqq %ymm5,%zmm6{%k7}"); + asm volatile("vcvttpd2uqq %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 79 */ + + asm volatile("vmwrite %eax,%ebx"); + asm volatile("vcvtps2udq %zmm5,%zmm6"); + asm volatile("vcvtpd2udq %zmm5,%ymm6{%k7}"); + asm volatile("vcvtsd2usi %xmm6,%eax"); + asm volatile("vcvtss2usi %xmm6,%eax"); + asm volatile("vcvtps2uqq %ymm5,%zmm6{%k7}"); + asm volatile("vcvtpd2uqq %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 7a */ + + asm volatile("vcvtudq2pd %ymm5,%zmm6{%k7}"); + asm volatile("vcvtuqq2pd %zmm5,%zmm6"); + asm volatile("vcvtudq2ps %zmm5,%zmm6"); + asm volatile("vcvtuqq2ps %zmm5,%ymm6{%k7}"); + asm volatile("vcvttps2qq %ymm5,%zmm6{%k7}"); + asm volatile("vcvttpd2qq %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 7b */ + + asm volatile("vcvtusi2sd %eax,%xmm5,%xmm6"); + asm volatile("vcvtusi2ss %eax,%xmm5,%xmm6"); + asm volatile("vcvtps2qq %ymm5,%zmm6{%k7}"); + asm volatile("vcvtpd2qq %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 7f */ + + asm volatile("movq.s %mm0,%mm4"); + asm volatile("vmovdqa.s %ymm5,%ymm6"); + asm volatile("vmovdqa32.s %zmm5,%zmm6"); + asm volatile("vmovdqa64.s %zmm5,%zmm6"); + asm volatile("vmovdqu.s %ymm5,%ymm6"); + asm volatile("vmovdqu32.s %zmm5,%zmm6"); + asm volatile("vmovdqu64.s %zmm5,%zmm6"); + asm volatile("vmovdqu8.s %zmm5,%zmm6"); + asm volatile("vmovdqu16.s %zmm5,%zmm6"); + + /* AVX-512: Op code 0f db */ + + asm volatile("pand %mm1,%mm2"); + asm volatile("pand %xmm1,%xmm2"); + asm volatile("vpand %ymm4,%ymm6,%ymm2"); + asm volatile("vpandd %zmm4,%zmm5,%zmm6"); + asm volatile("vpandq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f df */ + + asm volatile("pandn %mm1,%mm2"); + asm volatile("pandn %xmm1,%xmm2"); + asm volatile("vpandn %ymm4,%ymm6,%ymm2"); + asm volatile("vpandnd %zmm4,%zmm5,%zmm6"); + asm volatile("vpandnq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f e6 */ + + asm volatile("vcvttpd2dq %xmm1,%xmm2"); + asm volatile("vcvtdq2pd %xmm5,%xmm6"); + asm volatile("vcvtdq2pd %ymm5,%zmm6{%k7}"); + asm volatile("vcvtqq2pd %zmm5,%zmm6"); + asm volatile("vcvtpd2dq %xmm1,%xmm2"); + + /* AVX-512: Op code 0f eb */ + + asm volatile("por %mm4,%mm6"); + asm volatile("vpor %ymm4,%ymm6,%ymm2"); + asm volatile("vpord %zmm4,%zmm5,%zmm6"); + asm volatile("vporq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f ef */ + + asm volatile("pxor %mm4,%mm6"); + asm volatile("vpxor %ymm4,%ymm6,%ymm2"); + asm volatile("vpxord %zmm4,%zmm5,%zmm6"); + asm volatile("vpxorq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 10 */ + + asm volatile("pblendvb %xmm1,%xmm0"); + asm volatile("vpsrlvw %zmm4,%zmm5,%zmm6"); + asm volatile("vpmovuswb %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 11 */ + + asm volatile("vpmovusdb %zmm5,%xmm6{%k7}"); + asm volatile("vpsravw %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 12 */ + + asm volatile("vpmovusqb %zmm5,%xmm6{%k7}"); + asm volatile("vpsllvw %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 13 */ + + asm volatile("vcvtph2ps %xmm3,%ymm5"); + asm volatile("vcvtph2ps %ymm5,%zmm6{%k7}"); + asm volatile("vpmovusdw %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 14 */ + + asm volatile("blendvps %xmm1,%xmm0"); + asm volatile("vpmovusqw %zmm5,%xmm6{%k7}"); + asm volatile("vprorvd %zmm4,%zmm5,%zmm6"); + asm volatile("vprorvq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 15 */ + + asm volatile("blendvpd %xmm1,%xmm0"); + asm volatile("vpmovusqd %zmm5,%ymm6{%k7}"); + asm volatile("vprolvd %zmm4,%zmm5,%zmm6"); + asm volatile("vprolvq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 16 */ + + asm volatile("vpermps %ymm4,%ymm6,%ymm2"); + asm volatile("vpermps %ymm4,%ymm6,%ymm2{%k7}"); + asm volatile("vpermpd %ymm4,%ymm6,%ymm2{%k7}"); + + /* AVX-512: Op code 0f 38 19 */ + + asm volatile("vbroadcastsd %xmm4,%ymm6"); + asm volatile("vbroadcastf32x2 %xmm7,%zmm6"); + + /* AVX-512: Op code 0f 38 1a */ + + asm volatile("vbroadcastf128 (%ecx),%ymm4"); + asm volatile("vbroadcastf32x4 (%ecx),%zmm6"); + asm volatile("vbroadcastf64x2 (%ecx),%zmm6"); + + /* AVX-512: Op code 0f 38 1b */ + + asm volatile("vbroadcastf32x8 (%ecx),%zmm6"); + asm volatile("vbroadcastf64x4 (%ecx),%zmm6"); + + /* AVX-512: Op code 0f 38 1f */ + + asm volatile("vpabsq %zmm4,%zmm6"); + + /* AVX-512: Op code 0f 38 20 */ + + asm volatile("vpmovsxbw %xmm4,%xmm5"); + asm volatile("vpmovswb %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 21 */ + + asm volatile("vpmovsxbd %xmm4,%ymm6"); + asm volatile("vpmovsdb %zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 22 */ + + asm volatile("vpmovsxbq %xmm4,%ymm4"); + asm volatile("vpmovsqb %zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 23 */ + + asm volatile("vpmovsxwd %xmm4,%ymm4"); + asm volatile("vpmovsdw %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 24 */ + + asm volatile("vpmovsxwq %xmm4,%ymm6"); + asm volatile("vpmovsqw %zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 25 */ + + asm volatile("vpmovsxdq %xmm4,%ymm4"); + asm volatile("vpmovsqd %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 26 */ + + asm volatile("vptestmb %zmm5,%zmm6,%k5"); + asm volatile("vptestmw %zmm5,%zmm6,%k5"); + asm volatile("vptestnmb %zmm4,%zmm5,%k5"); + asm volatile("vptestnmw %zmm4,%zmm5,%k5"); + + /* AVX-512: Op code 0f 38 27 */ + + asm volatile("vptestmd %zmm5,%zmm6,%k5"); + asm volatile("vptestmq %zmm5,%zmm6,%k5"); + asm volatile("vptestnmd %zmm4,%zmm5,%k5"); + asm volatile("vptestnmq %zmm4,%zmm5,%k5"); + + /* AVX-512: Op code 0f 38 28 */ + + asm volatile("vpmuldq %ymm4,%ymm6,%ymm2"); + asm volatile("vpmovm2b %k5,%zmm6"); + asm volatile("vpmovm2w %k5,%zmm6"); + + /* AVX-512: Op code 0f 38 29 */ + + asm volatile("vpcmpeqq %ymm4,%ymm6,%ymm2"); + asm volatile("vpmovb2m %zmm6,%k5"); + asm volatile("vpmovw2m %zmm6,%k5"); + + /* AVX-512: Op code 0f 38 2a */ + + asm volatile("vmovntdqa (%ecx),%ymm4"); + asm volatile("vpbroadcastmb2q %k6,%zmm1"); + + /* AVX-512: Op code 0f 38 2c */ + + asm volatile("vmaskmovps (%ecx),%ymm4,%ymm6"); + asm volatile("vscalefps %zmm4,%zmm5,%zmm6"); + asm volatile("vscalefpd %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 2d */ + + asm volatile("vmaskmovpd (%ecx),%ymm4,%ymm6"); + asm volatile("vscalefss %xmm4,%xmm5,%xmm6{%k7}"); + asm volatile("vscalefsd %xmm4,%xmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 30 */ + + asm volatile("vpmovzxbw %xmm4,%ymm4"); + asm volatile("vpmovwb %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 31 */ + + asm volatile("vpmovzxbd %xmm4,%ymm6"); + asm volatile("vpmovdb %zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 32 */ + + asm volatile("vpmovzxbq %xmm4,%ymm4"); + asm volatile("vpmovqb %zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 33 */ + + asm volatile("vpmovzxwd %xmm4,%ymm4"); + asm volatile("vpmovdw %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 34 */ + + asm volatile("vpmovzxwq %xmm4,%ymm6"); + asm volatile("vpmovqw %zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 35 */ + + asm volatile("vpmovzxdq %xmm4,%ymm4"); + asm volatile("vpmovqd %zmm5,%ymm6{%k7}"); + + /* AVX-512: Op code 0f 38 36 */ + + asm volatile("vpermd %ymm4,%ymm6,%ymm2"); + asm volatile("vpermd %ymm4,%ymm6,%ymm2{%k7}"); + asm volatile("vpermq %ymm4,%ymm6,%ymm2{%k7}"); + + /* AVX-512: Op code 0f 38 38 */ + + asm volatile("vpminsb %ymm4,%ymm6,%ymm2"); + asm volatile("vpmovm2d %k5,%zmm6"); + asm volatile("vpmovm2q %k5,%zmm6"); + + /* AVX-512: Op code 0f 38 39 */ + + asm volatile("vpminsd %xmm1,%xmm2,%xmm3"); + asm volatile("vpminsd %zmm4,%zmm5,%zmm6"); + asm volatile("vpminsq %zmm4,%zmm5,%zmm6"); + asm volatile("vpmovd2m %zmm6,%k5"); + asm volatile("vpmovq2m %zmm6,%k5"); + + /* AVX-512: Op code 0f 38 3a */ + + asm volatile("vpminuw %ymm4,%ymm6,%ymm2"); + asm volatile("vpbroadcastmw2d %k6,%zmm6"); + + /* AVX-512: Op code 0f 38 3b */ + + asm volatile("vpminud %ymm4,%ymm6,%ymm2"); + asm volatile("vpminud %zmm4,%zmm5,%zmm6"); + asm volatile("vpminuq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 3d */ + + asm volatile("vpmaxsd %ymm4,%ymm6,%ymm2"); + asm volatile("vpmaxsd %zmm4,%zmm5,%zmm6"); + asm volatile("vpmaxsq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 3f */ + + asm volatile("vpmaxud %ymm4,%ymm6,%ymm2"); + asm volatile("vpmaxud %zmm4,%zmm5,%zmm6"); + asm volatile("vpmaxuq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 40 */ + + asm volatile("vpmulld %ymm4,%ymm6,%ymm2"); + asm volatile("vpmulld %zmm4,%zmm5,%zmm6"); + asm volatile("vpmullq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 42 */ + + asm volatile("vgetexpps %zmm5,%zmm6"); + asm volatile("vgetexppd %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 43 */ + + asm volatile("vgetexpss %xmm4,%xmm5,%xmm6{%k7}"); + asm volatile("vgetexpsd %xmm2,%xmm3,%xmm4{%k7}"); + + /* AVX-512: Op code 0f 38 44 */ + + asm volatile("vplzcntd %zmm5,%zmm6"); + asm volatile("vplzcntq %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 46 */ + + asm volatile("vpsravd %ymm4,%ymm6,%ymm2"); + asm volatile("vpsravd %zmm4,%zmm5,%zmm6"); + asm volatile("vpsravq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 4c */ + + asm volatile("vrcp14ps %zmm5,%zmm6"); + asm volatile("vrcp14pd %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 4d */ + + asm volatile("vrcp14ss %xmm4,%xmm5,%xmm6{%k7}"); + asm volatile("vrcp14sd %xmm4,%xmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 4e */ + + asm volatile("vrsqrt14ps %zmm5,%zmm6"); + asm volatile("vrsqrt14pd %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 4f */ + + asm volatile("vrsqrt14ss %xmm4,%xmm5,%xmm6{%k7}"); + asm volatile("vrsqrt14sd %xmm4,%xmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 38 59 */ + + asm volatile("vpbroadcastq %xmm4,%xmm6"); + asm volatile("vbroadcasti32x2 %xmm7,%zmm6"); + + /* AVX-512: Op code 0f 38 5a */ + + asm volatile("vbroadcasti128 (%ecx),%ymm4"); + asm volatile("vbroadcasti32x4 (%ecx),%zmm6"); + asm volatile("vbroadcasti64x2 (%ecx),%zmm6"); + + /* AVX-512: Op code 0f 38 5b */ + + asm volatile("vbroadcasti32x8 (%ecx),%zmm6"); + asm volatile("vbroadcasti64x4 (%ecx),%zmm6"); + + /* AVX-512: Op code 0f 38 64 */ + + asm volatile("vpblendmd %zmm4,%zmm5,%zmm6"); + asm volatile("vpblendmq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 65 */ + + asm volatile("vblendmps %zmm4,%zmm5,%zmm6"); + asm volatile("vblendmpd %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 66 */ + + asm volatile("vpblendmb %zmm4,%zmm5,%zmm6"); + asm volatile("vpblendmw %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 75 */ + + asm volatile("vpermi2b %zmm4,%zmm5,%zmm6"); + asm volatile("vpermi2w %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 76 */ + + asm volatile("vpermi2d %zmm4,%zmm5,%zmm6"); + asm volatile("vpermi2q %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 77 */ + + asm volatile("vpermi2ps %zmm4,%zmm5,%zmm6"); + asm volatile("vpermi2pd %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 7a */ + + asm volatile("vpbroadcastb %eax,%xmm3"); + + /* AVX-512: Op code 0f 38 7b */ + + asm volatile("vpbroadcastw %eax,%xmm3"); + + /* AVX-512: Op code 0f 38 7c */ + + asm volatile("vpbroadcastd %eax,%xmm3"); + + /* AVX-512: Op code 0f 38 7d */ + + asm volatile("vpermt2b %zmm4,%zmm5,%zmm6"); + asm volatile("vpermt2w %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 7e */ + + asm volatile("vpermt2d %zmm4,%zmm5,%zmm6"); + asm volatile("vpermt2q %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 7f */ + + asm volatile("vpermt2ps %zmm4,%zmm5,%zmm6"); + asm volatile("vpermt2pd %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 83 */ + + asm volatile("vpmultishiftqb %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 88 */ + + asm volatile("vexpandps (%ecx),%zmm6"); + asm volatile("vexpandpd (%ecx),%zmm6"); + + /* AVX-512: Op code 0f 38 89 */ + + asm volatile("vpexpandd (%ecx),%zmm6"); + asm volatile("vpexpandq (%ecx),%zmm6"); + + /* AVX-512: Op code 0f 38 8a */ + + asm volatile("vcompressps %zmm6,(%ecx)"); + asm volatile("vcompresspd %zmm6,(%ecx)"); + + /* AVX-512: Op code 0f 38 8b */ + + asm volatile("vpcompressd %zmm6,(%ecx)"); + asm volatile("vpcompressq %zmm6,(%ecx)"); + + /* AVX-512: Op code 0f 38 8d */ + + asm volatile("vpermb %zmm4,%zmm5,%zmm6"); + asm volatile("vpermw %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 90 */ + + asm volatile("vpgatherdd %xmm2,0x02(%ebp,%xmm7,2),%xmm1"); + asm volatile("vpgatherdq %xmm2,0x04(%ebp,%xmm7,2),%xmm1"); + asm volatile("vpgatherdd 0x7b(%ebp,%zmm7,8),%zmm6{%k1}"); + asm volatile("vpgatherdq 0x7b(%ebp,%ymm7,8),%zmm6{%k1}"); + + /* AVX-512: Op code 0f 38 91 */ + + asm volatile("vpgatherqd %xmm2,0x02(%ebp,%xmm7,2),%xmm1"); + asm volatile("vpgatherqq %xmm2,0x02(%ebp,%xmm7,2),%xmm1"); + asm volatile("vpgatherqd 0x7b(%ebp,%zmm7,8),%ymm6{%k1}"); + asm volatile("vpgatherqq 0x7b(%ebp,%zmm7,8),%zmm6{%k1}"); + + /* AVX-512: Op code 0f 38 a0 */ + + asm volatile("vpscatterdd %zmm6,0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vpscatterdq %zmm6,0x7b(%ebp,%ymm7,8){%k1}"); + + /* AVX-512: Op code 0f 38 a1 */ + + asm volatile("vpscatterqd %ymm6,0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vpscatterqq %ymm6,0x7b(%ebp,%ymm7,8){%k1}"); + + /* AVX-512: Op code 0f 38 a2 */ + + asm volatile("vscatterdps %zmm6,0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterdpd %zmm6,0x7b(%ebp,%ymm7,8){%k1}"); + + /* AVX-512: Op code 0f 38 a3 */ + + asm volatile("vscatterqps %ymm6,0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterqpd %zmm6,0x7b(%ebp,%zmm7,8){%k1}"); + + /* AVX-512: Op code 0f 38 b4 */ + + asm volatile("vpmadd52luq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 b5 */ + + asm volatile("vpmadd52huq %zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 c4 */ + + asm volatile("vpconflictd %zmm5,%zmm6"); + asm volatile("vpconflictq %zmm5,%zmm6"); + + /* AVX-512: Op code 0f 38 c8 */ + + asm volatile("vexp2ps %zmm6,%zmm7"); + asm volatile("vexp2pd %zmm6,%zmm7"); + + /* AVX-512: Op code 0f 38 ca */ + + asm volatile("vrcp28ps %zmm6,%zmm7"); + asm volatile("vrcp28pd %zmm6,%zmm7"); + + /* AVX-512: Op code 0f 38 cb */ + + asm volatile("vrcp28ss %xmm5,%xmm6,%xmm7{%k7}"); + asm volatile("vrcp28sd %xmm5,%xmm6,%xmm7{%k7}"); + + /* AVX-512: Op code 0f 38 cc */ + + asm volatile("vrsqrt28ps %zmm6,%zmm7"); + asm volatile("vrsqrt28pd %zmm6,%zmm7"); + + /* AVX-512: Op code 0f 38 cd */ + + asm volatile("vrsqrt28ss %xmm5,%xmm6,%xmm7{%k7}"); + asm volatile("vrsqrt28sd %xmm5,%xmm6,%xmm7{%k7}"); + + /* AVX-512: Op code 0f 3a 03 */ + + asm volatile("valignd $0x12,%zmm5,%zmm6,%zmm7"); + asm volatile("valignq $0x12,%zmm5,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 08 */ + + asm volatile("vroundps $0x5,%ymm6,%ymm2"); + asm volatile("vrndscaleps $0x12,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 3a 09 */ + + asm volatile("vroundpd $0x5,%ymm6,%ymm2"); + asm volatile("vrndscalepd $0x12,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 3a 0a */ + + asm volatile("vroundss $0x5,%xmm4,%xmm6,%xmm2"); + asm volatile("vrndscaless $0x12,%xmm4,%xmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 3a 0b */ + + asm volatile("vroundsd $0x5,%xmm4,%xmm6,%xmm2"); + asm volatile("vrndscalesd $0x12,%xmm4,%xmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 3a 18 */ + + asm volatile("vinsertf128 $0x5,%xmm4,%ymm4,%ymm6"); + asm volatile("vinsertf32x4 $0x12,%xmm4,%zmm5,%zmm6{%k7}"); + asm volatile("vinsertf64x2 $0x12,%xmm4,%zmm5,%zmm6{%k7}"); + + /* AVX-512: Op code 0f 3a 19 */ + + asm volatile("vextractf128 $0x5,%ymm4,%xmm4"); + asm volatile("vextractf32x4 $0x12,%zmm5,%xmm6{%k7}"); + asm volatile("vextractf64x2 $0x12,%zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 3a 1a */ + + asm volatile("vinsertf32x8 $0x12,%ymm5,%zmm6,%zmm7{%k7}"); + asm volatile("vinsertf64x4 $0x12,%ymm5,%zmm6,%zmm7{%k7}"); + + /* AVX-512: Op code 0f 3a 1b */ + + asm volatile("vextractf32x8 $0x12,%zmm6,%ymm7{%k7}"); + asm volatile("vextractf64x4 $0x12,%zmm6,%ymm7{%k7}"); + + /* AVX-512: Op code 0f 3a 1e */ + + asm volatile("vpcmpud $0x12,%zmm6,%zmm7,%k5"); + asm volatile("vpcmpuq $0x12,%zmm6,%zmm7,%k5"); + + /* AVX-512: Op code 0f 3a 1f */ + + asm volatile("vpcmpd $0x12,%zmm6,%zmm7,%k5"); + asm volatile("vpcmpq $0x12,%zmm6,%zmm7,%k5"); + + /* AVX-512: Op code 0f 3a 23 */ + + asm volatile("vshuff32x4 $0x12,%zmm5,%zmm6,%zmm7"); + asm volatile("vshuff64x2 $0x12,%zmm5,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 25 */ + + asm volatile("vpternlogd $0x12,%zmm5,%zmm6,%zmm7"); + asm volatile("vpternlogq $0x12,%zmm5,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 26 */ + + asm volatile("vgetmantps $0x12,%zmm6,%zmm7"); + asm volatile("vgetmantpd $0x12,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 27 */ + + asm volatile("vgetmantss $0x12,%xmm5,%xmm6,%xmm7{%k7}"); + asm volatile("vgetmantsd $0x12,%xmm5,%xmm6,%xmm7{%k7}"); + + /* AVX-512: Op code 0f 3a 38 */ + + asm volatile("vinserti128 $0x5,%xmm4,%ymm4,%ymm6"); + asm volatile("vinserti32x4 $0x12,%xmm4,%zmm5,%zmm6{%k7}"); + asm volatile("vinserti64x2 $0x12,%xmm4,%zmm5,%zmm6{%k7}"); + + /* AVX-512: Op code 0f 3a 39 */ + + asm volatile("vextracti128 $0x5,%ymm4,%xmm6"); + asm volatile("vextracti32x4 $0x12,%zmm5,%xmm6{%k7}"); + asm volatile("vextracti64x2 $0x12,%zmm5,%xmm6{%k7}"); + + /* AVX-512: Op code 0f 3a 3a */ + + asm volatile("vinserti32x8 $0x12,%ymm5,%zmm6,%zmm7{%k7}"); + asm volatile("vinserti64x4 $0x12,%ymm5,%zmm6,%zmm7{%k7}"); + + /* AVX-512: Op code 0f 3a 3b */ + + asm volatile("vextracti32x8 $0x12,%zmm6,%ymm7{%k7}"); + asm volatile("vextracti64x4 $0x12,%zmm6,%ymm7{%k7}"); + + /* AVX-512: Op code 0f 3a 3e */ + + asm volatile("vpcmpub $0x12,%zmm6,%zmm7,%k5"); + asm volatile("vpcmpuw $0x12,%zmm6,%zmm7,%k5"); + + /* AVX-512: Op code 0f 3a 3f */ + + asm volatile("vpcmpb $0x12,%zmm6,%zmm7,%k5"); + asm volatile("vpcmpw $0x12,%zmm6,%zmm7,%k5"); + + /* AVX-512: Op code 0f 3a 42 */ + + asm volatile("vmpsadbw $0x5,%ymm4,%ymm6,%ymm2"); + asm volatile("vdbpsadbw $0x12,%zmm4,%zmm5,%zmm6"); + + /* AVX-512: Op code 0f 3a 43 */ + + asm volatile("vshufi32x4 $0x12,%zmm5,%zmm6,%zmm7"); + asm volatile("vshufi64x2 $0x12,%zmm5,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 50 */ + + asm volatile("vrangeps $0x12,%zmm5,%zmm6,%zmm7"); + asm volatile("vrangepd $0x12,%zmm5,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 51 */ + + asm volatile("vrangess $0x12,%xmm5,%xmm6,%xmm7"); + asm volatile("vrangesd $0x12,%xmm5,%xmm6,%xmm7"); + + /* AVX-512: Op code 0f 3a 54 */ + + asm volatile("vfixupimmps $0x12,%zmm5,%zmm6,%zmm7"); + asm volatile("vfixupimmpd $0x12,%zmm5,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 55 */ + + asm volatile("vfixupimmss $0x12,%xmm5,%xmm6,%xmm7{%k7}"); + asm volatile("vfixupimmsd $0x12,%xmm5,%xmm6,%xmm7{%k7}"); + + /* AVX-512: Op code 0f 3a 56 */ + + asm volatile("vreduceps $0x12,%zmm6,%zmm7"); + asm volatile("vreducepd $0x12,%zmm6,%zmm7"); + + /* AVX-512: Op code 0f 3a 57 */ + + asm volatile("vreducess $0x12,%xmm5,%xmm6,%xmm7"); + asm volatile("vreducesd $0x12,%xmm5,%xmm6,%xmm7"); + + /* AVX-512: Op code 0f 3a 66 */ + + asm volatile("vfpclassps $0x12,%zmm7,%k5"); + asm volatile("vfpclasspd $0x12,%zmm7,%k5"); + + /* AVX-512: Op code 0f 3a 67 */ + + asm volatile("vfpclassss $0x12,%xmm7,%k5"); + asm volatile("vfpclasssd $0x12,%xmm7,%k5"); + + /* AVX-512: Op code 0f 72 (Grp13) */ + + asm volatile("vprord $0x12,%zmm5,%zmm6"); + asm volatile("vprorq $0x12,%zmm5,%zmm6"); + asm volatile("vprold $0x12,%zmm5,%zmm6"); + asm volatile("vprolq $0x12,%zmm5,%zmm6"); + asm volatile("psrad $0x2,%mm6"); + asm volatile("vpsrad $0x5,%ymm6,%ymm2"); + asm volatile("vpsrad $0x5,%zmm6,%zmm2"); + asm volatile("vpsraq $0x5,%zmm6,%zmm2"); + + /* AVX-512: Op code 0f 38 c6 (Grp18) */ + + asm volatile("vgatherpf0dps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vgatherpf0dpd 0x7b(%ebp,%ymm7,8){%k1}"); + asm volatile("vgatherpf1dps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vgatherpf1dpd 0x7b(%ebp,%ymm7,8){%k1}"); + asm volatile("vscatterpf0dps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterpf0dpd 0x7b(%ebp,%ymm7,8){%k1}"); + asm volatile("vscatterpf1dps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterpf1dpd 0x7b(%ebp,%ymm7,8){%k1}"); + + /* AVX-512: Op code 0f 38 c7 (Grp19) */ + + asm volatile("vgatherpf0qps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vgatherpf0qpd 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vgatherpf1qps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vgatherpf1qpd 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterpf0qps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterpf0qpd 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterpf1qps 0x7b(%ebp,%zmm7,8){%k1}"); + asm volatile("vscatterpf1qpd 0x7b(%ebp,%zmm7,8){%k1}"); + + /* AVX-512: Examples */ + + asm volatile("vaddpd %zmm4,%zmm5,%zmm6"); + asm volatile("vaddpd %zmm4,%zmm5,%zmm6{%k7}"); + asm volatile("vaddpd %zmm4,%zmm5,%zmm6{%k7}{z}"); + asm volatile("vaddpd {rn-sae},%zmm4,%zmm5,%zmm6"); + asm volatile("vaddpd {ru-sae},%zmm4,%zmm5,%zmm6"); + asm volatile("vaddpd {rd-sae},%zmm4,%zmm5,%zmm6"); + asm volatile("vaddpd {rz-sae},%zmm4,%zmm5,%zmm6"); + asm volatile("vaddpd (%ecx),%zmm5,%zmm6"); + asm volatile("vaddpd 0x123(%eax,%ecx,8),%zmm5,%zmm6"); + asm volatile("vaddpd (%ecx){1to8},%zmm5,%zmm6"); + asm volatile("vaddpd 0x1fc0(%edx),%zmm5,%zmm6"); + asm volatile("vaddpd 0x3f8(%edx){1to8},%zmm5,%zmm6"); + asm volatile("vcmpeq_uqps 0x1fc(%edx){1to16},%zmm6,%k5"); + asm volatile("vcmpltsd 0x123(%eax,%ecx,8),%xmm3,%k5{%k7}"); + asm volatile("vcmplesd {sae},%xmm4,%xmm5,%k5{%k7}"); + asm volatile("vgetmantss $0x5b,0x123(%eax,%ecx,8),%xmm4,%xmm5{%k7}"); + /* bndmk m32, bnd */ asm volatile("bndmk (%eax), %bnd0");

[4/4] perf tools: Add AVX-512 instructions to the new instructions test

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Patch