From patchwork Mon Oct 5 19:34:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Gardner X-Patchwork-Id: 526477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) by ozlabs.org (Postfix) with ESMTP id 3D4831402A2; Tue, 6 Oct 2015 06:34:36 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1ZjBWm-0000lE-BO; Mon, 05 Oct 2015 19:34:28 +0000 Received: from mail-pa0-f48.google.com ([209.85.220.48]) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1ZjBWh-0000l8-8q for kernel-team@lists.ubuntu.com; Mon, 05 Oct 2015 19:34:23 +0000 Received: by pablk4 with SMTP id lk4so184384775pab.3 for ; Mon, 05 Oct 2015 12:34:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id; bh=wXd6bij9lTiL9kNprdtb53MNUW8CO6peG9gN0Oet72Y=; b=T3r7Fa6GbCOU3E21BagCpJ85R3mnPcWf7IAv80r5uHtpQXetM7Q0dDZzsbmpgcQRNb AvAlYdzPzQokSKzj1khBKsLZJNzxfIUTaZzmaBDmBfBm1teQy9j6sahYlt0BQDRY2eRG tlI3kJokyiYv3K4PPJa9ovFP68bdab4bTUevBFaGoNLGDGfa8SQsROdn7z8oX9MtVWZD rIEYrpae9l90o5aCBT0K3RARdK4qXChGfsOwi/JDNTUEl1tKv4A9xuQltX1Nu5Ga+Hbt CDijLbpOK7UtkZEeTUP6Fl3hVN9sSoP9T3AwHuzdScVsYP7DXb9DFvzLEgU3dfjrUJsg StfQ== X-Gm-Message-State: ALoCoQnlOu8sUvhhcFz5IiF4N4FVilPs/OitIXsoX5VQENwLl/mu5nivuPaXwl6lsfh/huRVLbGW X-Received: by 10.66.241.40 with SMTP id wf8mr42641660pac.157.1444073662541; Mon, 05 Oct 2015 12:34:22 -0700 (PDT) Received: from localhost.localdomain (host-174-45-38-91.hln-mt.client.bresnan.net. [174.45.38.91]) by smtp.gmail.com with ESMTPSA id kv9sm29350335pab.39.2015.10.05.12.34.21 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Oct 2015 12:34:21 -0700 (PDT) From: tim.gardner@canonical.com To: kernel-team@lists.ubuntu.com Subject: [PATCH Vivid SRU] powerpc/eeh: Fix missed PE#0 on P7IOC Date: Mon, 5 Oct 2015 13:34:17 -0600 Message-Id: <1444073657-26131-1-git-send-email-tim.gardner@canonical.com> X-Mailer: git-send-email 1.9.1 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.14 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: kernel-team-bounces@lists.ubuntu.com From: Gavin Shan BugLink: http://bugs.launchpad.net/bugs/1502982 PE#0 should be regarded as valid for P7IOC, while it's invalid for PHB3. The patch adds flag EEH_VALID_PE_ZERO to differentiate those two cases. Without the patch, we possibly see frozen PE#0 state is cleared without EEH recovery taken on P7IOC as following kernel logs indicate: [root@ltcfbl8eb ~]# dmesg : pci 0000:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0000:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0001:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0001:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0002:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0002:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0003:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0003:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0003:20 : [PE# 002] Secondary bus 32..63 associated with PE#2 : EEH: Clear non-existing PHB#3-PE#0 EEH: PHB location: U78AE.001.WZS00M9-P1-002 Signed-off-by: Gavin Shan Signed-off-by: Michael Ellerman (cherry picked from commit 2aa5cf9e48f2f39cc255f8e29964df3ff9ca017b) Signed-off-by: Tim Gardner --- arch/powerpc/include/asm/eeh.h | 5 +++-- arch/powerpc/kernel/eeh_pe.c | 14 +++++++++++--- arch/powerpc/platforms/powernv/eeh-powernv.c | 11 +++++++++++ 3 files changed, 25 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h index 40bde0a..55abfd0 100644 --- a/arch/powerpc/include/asm/eeh.h +++ b/arch/powerpc/include/asm/eeh.h @@ -38,8 +38,9 @@ struct device_node; #define EEH_FORCE_DISABLED 0x02 /* EEH disabled */ #define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */ #define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */ -#define EEH_ENABLE_IO_FOR_LOG 0x10 /* Enable IO for log */ -#define EEH_EARLY_DUMP_LOG 0x20 /* Dump log immediately */ +#define EEH_VALID_PE_ZERO 0x10 /* PE#0 is valid */ +#define EEH_ENABLE_IO_FOR_LOG 0x20 /* Enable IO for log */ +#define EEH_EARLY_DUMP_LOG 0x40 /* Dump log immediately */ /* * Delay for PE reset, all in ms diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c index ea83ad9..1e4946c 100644 --- a/arch/powerpc/kernel/eeh_pe.c +++ b/arch/powerpc/kernel/eeh_pe.c @@ -239,10 +239,18 @@ static void *__eeh_pe_get(void *data, void *flag) if (pe->type & EEH_PE_PHB) return NULL; - /* We prefer PE address */ - if (edev->pe_config_addr && - (edev->pe_config_addr == pe->addr)) + /* + * We prefer PE address. For most cases, we should + * have non-zero PE address + */ + if (eeh_has_flag(EEH_VALID_PE_ZERO)) { + if (edev->pe_config_addr == pe->addr) + return pe; + } else { + if (edev->pe_config_addr && + (edev->pe_config_addr == pe->addr)) return pe; + } /* Try BDF address */ if (edev->config_addr && diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index 1d19e79..e261869 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c @@ -68,6 +68,17 @@ static int powernv_eeh_init(void) if (phb->model == PNV_PHB_MODEL_P7IOC) eeh_add_flag(EEH_ENABLE_IO_FOR_LOG); + + /* + * PE#0 should be regarded as valid by EEH core + * if it's not the reserved one. Currently, we + * have the reserved PE#0 and PE#127 for PHB3 + * and P7IOC separately. So we should regard + * PE#0 as valid for P7IOC. + */ + if (phb->ioda.reserved_pe != 0) + eeh_add_flag(EEH_VALID_PE_ZERO); + break; }