From patchwork Mon Jul 21 14:00:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luis Henriques X-Patchwork-Id: 372074 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) by ozlabs.org (Postfix) with ESMTP id 4EB85140193; Tue, 22 Jul 2014 00:01:11 +1000 (EST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1X9E9C-0002WI-DN; Mon, 21 Jul 2014 14:00:58 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1X9E8W-0002CJ-AR for kernel-team@lists.ubuntu.com; Mon, 21 Jul 2014 14:00:16 +0000 Received: from bl15-101-232.dsl.telepac.pt ([188.80.101.232] helo=localhost) by youngberry.canonical.com with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1X9E8V-0008G9-5r; Mon, 21 Jul 2014 14:00:15 +0000 From: Luis Henriques To: Vincent Minet Subject: [3.11.y.z extended stable] Patch "intel_pstate: Set CPU number before accessing MSRs" has been added to staging queue Date: Mon, 21 Jul 2014 15:00:13 +0100 Message-Id: <1405951213-1975-1-git-send-email-luis.henriques@canonical.com> X-Mailer: git-send-email 1.9.1 X-Extended-Stable: 3.11 Cc: kernel-team@lists.ubuntu.com, "Rafael J. Wysocki" X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.14 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: kernel-team-bounces@lists.ubuntu.com This is a note to let you know that I have just added a patch titled intel_pstate: Set CPU number before accessing MSRs to the linux-3.11.y-queue branch of the 3.11.y.z extended stable tree which can be found at: http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.11.y-queue If you, or anyone else, feels it should not be added to this tree, please reply to this email. For more information about the 3.11.y.z tree, see https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable Thanks. -Luis ------ From 0d4b0b86107dfc7e71f79731c6c3aab0cfc1e941 Mon Sep 17 00:00:00 2001 From: Vincent Minet Date: Sat, 5 Jul 2014 01:51:33 +0200 Subject: [PATCH 15/41] intel_pstate: Set CPU number before accessing MSRs commit 179e8471673ce0249cd4ecda796008f7757e5bad upstream. Ensure that cpu->cpu is set before writing MSR_IA32_PERF_CTL during CPU initialization. Otherwise only cpu0 has its P-state set and all other cores are left with their values unchanged. In most cases, this is not too serious because the P-states will be set correctly when the timer function is run. But when the default governor is set to performance, the per-CPU current_pstate stays the same forever and no attempts are made to write the MSRs again. Signed-off-by: Vincent Minet Signed-off-by: Rafael J. Wysocki [ luis: backported to 3.11: - moved cpu->cpu up, instead of intel_pstate_get_cpu_pstates() down ] Signed-off-by: Luis Henriques --- drivers/cpufreq/intel_pstate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index e52e5420033a..96a4c6e4d526 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -550,6 +550,7 @@ static int intel_pstate_init_cpu(unsigned int cpunum) cpu = all_cpu_data[cpunum]; + cpu->cpu = cpunum; intel_pstate_get_cpu_pstates(cpu); if (!cpu->pstate.current_pstate) { all_cpu_data[cpunum] = NULL; @@ -557,7 +558,6 @@ static int intel_pstate_init_cpu(unsigned int cpunum) return -ENODATA; } - cpu->cpu = cpunum; cpu->pstate_policy = (struct pstate_adjust_policy *)id->driver_data; init_timer_deferrable(&cpu->timer);