From patchwork Fri Feb 19 15:16:35 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Colin Ian King X-Patchwork-Id: 45860 X-Patchwork-Delegate: stefan.bader@canonical.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from chlorine.canonical.com (chlorine.canonical.com [91.189.94.204]) by ozlabs.org (Postfix) with ESMTP id E917EB7CE4 for ; Sat, 20 Feb 2010 02:16:47 +1100 (EST) Received: from localhost ([127.0.0.1] helo=chlorine.canonical.com) by chlorine.canonical.com with esmtp (Exim 4.69) (envelope-from ) id 1NiUau-0001zO-Nc; Fri, 19 Feb 2010 15:16:40 +0000 Received: from adelie.canonical.com ([91.189.90.139]) by chlorine.canonical.com with esmtp (Exim 4.69) (envelope-from ) id 1NiUas-0001yz-L3 for kernel-team@lists.ubuntu.com; Fri, 19 Feb 2010 15:16:38 +0000 Received: from hutte.canonical.com ([91.189.90.181]) by adelie.canonical.com with esmtp (Exim 4.69 #1 (Debian)) id 1NiUas-0005OL-Jk for ; Fri, 19 Feb 2010 15:16:38 +0000 Received: from cpc2-craw3-0-0-cust718.croy.cable.virginmedia.com ([82.44.34.207] helo=localhost) by hutte.canonical.com with esmtpsa (TLS-1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.69) (envelope-from ) id 1NiUas-0006sK-BJ for kernel-team@lists.ubuntu.com; Fri, 19 Feb 2010 15:16:38 +0000 From: Colin King To: kernel-team@lists.ubuntu.com Subject: [PATCH 1/1] UBUNTU: Disable 4MB page tables for Atom, work around errata AAE44 Date: Fri, 19 Feb 2010 15:16:35 +0000 Message-Id: <1266592595-25839-2-git-send-email-colin.king@canonical.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1266592595-25839-1-git-send-email-colin.king@canonical.com> References: <1266592595-25839-1-git-send-email-colin.king@canonical.com> X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.9 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: kernel-team-bounces@lists.ubuntu.com Errors-To: kernel-team-bounces@lists.ubuntu.com From: Colin Ian King BugLink: https://bugs.launchpad.net/bugs/523112 This patch addresses Intel errata AAE44 by totally disabling 4MB pages and thus avoiding avoiding large pages being split into smaller 4K pages and thus never tripping this CPU feature. The bug can manifests itself as instruction fetch oopses on seemingly legitimate executable pages. Errata AAE44 (http://download.intel.com/design/processor/specupdt/319536.pdf page 33) states: "If software clears the PS (page size) bit in a present PDE (page directory entry), that will cause linear addresses mapped through this PDE to use 4-KByte pages instead of using a large page after old TLB entries are invalidated. Due to this erratum, if a code fetch uses this PDE before the TLB entry for the large page is invalidated then it may fetch from a different physical address than specified by either the old large page translation or the new 4-KByte page translation. This erratum may also cause speculative code fetches from incorrect addresses." Signed-off-by: Colin Ian King Acked-by: Stefan Bader --- arch/x86/kernel/cpu/bugs.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 205fd5b..524db95 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -173,6 +173,22 @@ static void __init check_config(void) #endif } +static void __init check_atom(void) +{ + extern int disable_pse; + + /* + * Disable 4MB page tables to work around Intel errata AAE44 for + * Atom. We cannot guarantee stopping undefined processor behaviour + * when two pageing structure translations differ with respect to + * page frame sizes. Hence, for Atoms we disable the PSE. + */ + if (boot_cpu_data.x86_model == 0x1c) { + clear_bit(X86_FEATURE_PSE, boot_cpu_data.x86_capability); + disable_pse = 1; + printk(KERN_INFO "Disabling 4MB page tables to avoid TLB bug\n"); + } +} void __init check_bugs(void) { @@ -185,6 +201,7 @@ void __init check_bugs(void) check_fpu(); check_hlt(); check_popad(); + check_atom(); init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); alternative_instructions(); }