From patchwork Wed Aug 18 01:27:07 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leann Ogasawara X-Patchwork-Id: 61978 X-Patchwork-Delegate: leann.ogasawara@canonical.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from chlorine.canonical.com (chlorine.canonical.com [91.189.94.204]) by ozlabs.org (Postfix) with ESMTP id BE7E9B70E0 for ; Wed, 18 Aug 2010 11:27:33 +1000 (EST) Received: from localhost ([127.0.0.1] helo=chlorine.canonical.com) by chlorine.canonical.com with esmtp (Exim 4.69) (envelope-from ) id 1OlXR9-000507-NW; Wed, 18 Aug 2010 02:27:27 +0100 Received: from adelie.canonical.com ([91.189.90.139]) by chlorine.canonical.com with esmtp (Exim 4.69) (envelope-from ) id 1OlXR6-0004yc-VO for kernel-team@lists.ubuntu.com; Wed, 18 Aug 2010 02:27:25 +0100 Received: from hutte.canonical.com ([91.189.90.181]) by adelie.canonical.com with esmtp (Exim 4.69 #1 (Debian)) id 1OlXR6-0006Hh-Tf for ; Wed, 18 Aug 2010 02:27:24 +0100 Received: from c-76-105-148-120.hsd1.or.comcast.net ([76.105.148.120] helo=localhost) by hutte.canonical.com with esmtpsa (TLS-1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.69) (envelope-from ) id 1OlXR6-0001t9-9X for kernel-team@lists.ubuntu.com; Wed, 18 Aug 2010 02:27:24 +0100 From: leann.ogasawara@canonical.com To: kernel-team@lists.ubuntu.com Subject: [PATCH 3/6] IPS driver: add GPU busy and turbo checking Date: Tue, 17 Aug 2010 18:27:07 -0700 Message-Id: <0ed24c67154be21fc6041c056fbe9f8a20e08d00.1282089274.git.leann.ogasawara@canonical.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.9 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: kernel-team-bounces@lists.ubuntu.com Errors-To: kernel-team-bounces@lists.ubuntu.com BugLink: http://bugs.launchpad.net/bugs/601057 Be sure to enable GPU turbo by default at load time and check GPU busy and MCP exceeded status correctly. Also fix up CPU power comparison and work around buggy MCH temp reporting. Signed-off-by: Jesse Barnes Signed-off-by: Matthew Garrett (cherry picked from commit 0385e5210c83b13fe685c54b6063655f80bce3ee) Signed-off-by: Leann Ogasawara --- drivers/platform/x86/intel_ips.c | 30 +++++++++++++++++------------- 1 files changed, 17 insertions(+), 13 deletions(-) diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_ips.c index f1dce3b..cdaf40e 100644 --- a/drivers/platform/x86/intel_ips.c +++ b/drivers/platform/x86/intel_ips.c @@ -515,7 +515,10 @@ static void ips_disable_cpu_turbo(struct ips_driver *ips) */ static bool ips_gpu_busy(struct ips_driver *ips) { - return false; + if (!ips->gpu_turbo_enabled) + return false; + + return ips->gpu_busy(); } /** @@ -627,7 +630,7 @@ static bool cpu_exceeded(struct ips_driver *ips, int cpu) avg = cpu ? ips->ctv2_avg_temp : ips->ctv1_avg_temp; if (avg > (ips->limits->core_temp_limit * 100)) ret = true; - if (ips->cpu_avg_power > ips->core_power_limit) + if (ips->cpu_avg_power > ips->core_power_limit * 100) ret = true; spin_unlock_irqrestore(&ips->turbo_status_lock, flags); @@ -652,6 +655,8 @@ static bool mch_exceeded(struct ips_driver *ips) spin_lock_irqsave(&ips->turbo_status_lock, flags); if (ips->mch_avg_temp > (ips->limits->mch_temp_limit * 100)) ret = true; + if (ips->mch_avg_power > ips->mch_power_limit) + ret = true; spin_unlock_irqrestore(&ips->turbo_status_lock, flags); return ret; @@ -747,7 +752,7 @@ static int ips_adjust(void *data) ips_disable_gpu_turbo(ips); /* We're outside our comfort zone, crank them down */ - if (!mcp_exceeded(ips)) { + if (mcp_exceeded(ips)) { ips_cpu_lower(ips); ips_gpu_lower(ips); goto sleep; @@ -808,8 +813,7 @@ static u16 read_mgtv(struct ips_driver *ips) ret = ((val * slope + 0x40) >> 7) + offset; - - return ret; + return 0; /* MCH temp reporting buggy */ } static u16 read_ptv(struct ips_driver *ips) @@ -1471,14 +1475,6 @@ static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) if (trc & TRC_CORE2_EN) ips->second_cpu = true; - if (!ips_get_i915_syms(ips)) { - dev_err(&dev->dev, "failed to get i915 symbols, graphics turbo disabled\n"); - ips->gpu_turbo_enabled = false; - } else { - dev_dbg(&dev->dev, "graphics turbo enabled\n"); - ips->gpu_turbo_enabled = true; - } - update_turbo_limits(ips); dev_dbg(&dev->dev, "max cpu power clamp: %dW\n", ips->mcp_power_limit / 10); @@ -1488,6 +1484,14 @@ static int ips_probe(struct pci_dev *dev, const struct pci_device_id *id) if (thm_readl(THM_PSC) & PSP_PBRT) ips->poll_turbo_status = true; + if (!ips_get_i915_syms(ips)) { + dev_err(&dev->dev, "failed to get i915 symbols, graphics turbo disabled\n"); + ips->gpu_turbo_enabled = false; + } else { + dev_dbg(&dev->dev, "graphics turbo enabled\n"); + ips->gpu_turbo_enabled = true; + } + /* * Check PLATFORM_INFO MSR to make sure this chip is * turbo capable.