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Thu, 16 Feb 2023 08:24:34 -0800 From: Asmaa Mnebhi To: Subject: [PATCH v1 0/2] gpio: Restrict usage of GPIO chip irq members before initialization Date: Thu, 16 Feb 2023 11:24:29 -0500 Message-ID: X-Mailer: git-send-email 2.30.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E655:EE_|MW4PR12MB6705:EE_ X-MS-Office365-Filtering-Correlation-Id: 18563b82-89f5-4eac-191c-08db103a4cc5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: LfJMblodBr5sLw/P0OF8fbkhYOjaMJ3t+Ky4SRNEL1a6TkmWK6gC4pHaZKqnhT029ZPWBXk0BFPx79Gk0z5akpTgRh14YdFJ/ri8jB6P6ss2jX0DTI7QaE2bfR9f85WKDGXN3FunK7TDIVQE5j2h42FXngmPJJpiUMGfkjC5nzzJP60TJM7KHhz7SxfPAWYYveSB8IlWc2igudKi0dQ3gjSZ2oY5z7c+TKpJAhK8O57Z7ssR48TFUBDn3vvpOofcXgGih9Ucv2p3JOPHXev5lNbbJeNYbse5tN0WBrHL5601rh+VZChUJBpgUjjhWsearl2eHjrbHTme32LYp6FJDd7OVuXMorPLsri4XhRj0kUxQsbSLoMCyze00fxhZ6mKlMA2B0mq6k4K5XCGjJHElFQPzH8I/huyESqo3jZCMzKTN1MUZ/M6gnbZ71z+DPKD1ejC+gYJC+/3wsMCCu7fr1/Y6eeaj268JOEiOW3cN2PRZJcyunettD8+MOHbgy1Uka+B9mavwgMut6ub8B0eFLFRyr0N66C0j7J/lh+fC/GuIX++IC9vXbebC8hzpJ/hoGbrtCFs30ksRxj4mQJqK53OeYYziBI9N36PH78tFAO2PUhEGbIf9JwXqC06OKcXV1scZw6o6Z4SLkbvMmLM8uEl09c33OzSH1IDoOYgMDGCJCrGnyWua6remPOw0HZe3S4XJkjTjycR3I25Dt1SiURErahC8yVMGcMyLh/iSWTigg6Fze5BR3XS+LCN72Y6 X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230025)(4636009)(396003)(39860400002)(346002)(376002)(136003)(451199018)(40470700004)(46966006)(36840700001)(2616005)(107886003)(316002)(2906002)(478600001)(426003)(336012)(8936002)(47076005)(8676002)(70586007)(86362001)(4326008)(6916009)(6666004)(41300700001)(36756003)(5660300002)(70206006)(186003)(26005)(966005)(7696005)(40460700003)(36860700001)(83380400001)(54906003)(7636003)(82310400005)(82740400003)(356005)(40480700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2023 16:24:38.3783 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 18563b82-89f5-4eac-191c-08db103a4cc5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000E655.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6705 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: vlad@nvidia.com, meriton@nvidia.com, khoav@nvidia.com, Asmaa Mnebhi Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/2007581 SRU Justification: [Impact] GPIO chip irq members are exposed before they could be completely initialized and this leads to race conditions. One such issue was observed for the gc->irq.domain variable which was accessed through the pwr-mlxbf.c driver in gpiochip_to_irq() before it could be initialized by gpiochip_add_irqchip(). This resulted in Kernel NULL pointer dereference. This is a well known issue in the linux community and was fixed via 2 commits: 5467801f1fcbdc46bc7298a84dbf3ca1ff2a7320 and 06fb4ecfeac7e00d6704fa5ed19299f2fefb3cc9 (since the previous commit caused a regression) This race condition is intermittent and hard to reproduce. [Fix] * Backport: 5467801f1fcbdc46bc7298a84dbf3ca1ff2a7320 to fix the bug at stake * Backport: 06fb4ecfeac7e00d6704fa5ed19299f2fefb3cc9 to fix a regression introduced by the previous commit [Test Case] * Check that the gpio-mlxbf2.c driver is loaded with no kernel panic * check that all drivers dependent on gpio-mlxbf2.c driver are loaded (mlxbf-gige and pwr-mlxbf) * do 5000 reboots to make sure this race condition no longer happens [Regression Potential] This could cause some regression with the use of gpio interrupts so it is important to test the dependent drivers mlxbf-gige and pwr-mlxbf. Trigger power reset interrupt to test pwr-mlxbf and bring down/up the oob_net0 interface to test mlxbf-gige. Mario Limonciello (1): gpio: Request interrupts after IRQ is initialized Shreeya Patel (1): gpio: Restrict usage of GPIO chip irq members before initialization drivers/gpio/gpiolib.c | 19 +++++++++++++++++++ include/linux/gpio/driver.h | 9 +++++++++ 2 files changed, 28 insertions(+)