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[61.220.137.37]) by smtp.gmail.com with ESMTPSA id o15sm5201951pfp.91.2020.10.29.23.02.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2020 23:02:16 -0700 (PDT) From: AceLan Kao To: kernel-team@lists.ubuntu.com Subject: [PATCH 0/5][SRU][G][OEM-5.6] Tiger Lake PMC core driver fixes Date: Fri, 30 Oct 2020 14:01:46 +0800 Message-Id: <20201030060214.780883-1-acelan.kao@canonical.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.215.194; envelope-from=acelan@gmail.com; helo=mail-pg1-f194.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1899883 [Impact] The power gating status is not correct and the slp_s0 value is not correct on Intel TigerLake platform. [Fix] The patchset in https://lore.kernel.org/lkml/20201006224702.12697-1-david.e.box@linux.intel.com/ provides several critical fixes for intel_pmc_core driver. [Test] Verified on some TigerLake platforms [Regression Potential] Low, the fix for status bits map and the slp_s0 calculation are simple and clear, should have low impact on regression. David E. Box (1): platform/x86: pmc_core: Use descriptive names for LPM registers Gaurav Singh (1): platform/x86: intel_pmc_core: fix bound check in pmc_core_mphy_pg_show() Gayatri Kammela (2): platform/x86: intel_pmc_core: Fix TigerLake power gating status map platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed value Sathyanarayana Nujella (1): platform/x86: intel_pmc_core: update TGL's LPM0 reg bit map name drivers/platform/x86/intel_pmc_core.c | 86 ++++++++++++++------------- drivers/platform/x86/intel_pmc_core.h | 5 +- 2 files changed, 49 insertions(+), 42 deletions(-) Acked-by: Stefan Bader Acked-by: Kelsey Skunberg