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[73.243.191.173]) by smtp.gmail.com with ESMTPSA id x70sm644522oif.3.2020.08.12.11.42.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2020 11:42:48 -0700 (PDT) From: Kelsey Skunberg To: kernel-team@lists.ubuntu.com Subject: [B+F:linux-azure][SRU][PATCH v2 0/4] LP#:1875467: Enable invariant TSC Date: Wed, 12 Aug 2020 12:42:42 -0600 Message-Id: <20200812184246.14738-1-kelsey.skunberg@canonical.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1875467 [Impact] Microsoft would like to request two commits in all releases supported on Azure. These commits benefit SAP workloads. These requested commits will enable support for Invariant TSC in Linux guest VMs. The invariant TSC means that the TSC continues at a fixed rate regardless of the C-state or frequency of the processor (as long as the processor remains in the ACPI S0 state). These patches will allow guests to access the HvSyntheticInvariantTscControl MSR and set bit 0 of this synthetic MSR, which then enables the InvariantTSC feature. After setting the synthetic MSR, CPUID will enumerate support for InvariantTSC. [Test Case] If the hardware supports TSC scaling, Hyper-V will set bit 15 of the HV_PARTITION_PRIVILEGE_MASK in guest VMs with a compatible Hyper-V configuration version. Bit 15 corresponds to the AccessTscInvariantControls privilege. If this privilege bit is set, guests can access the HvSyntheticInvariantTscControl MSR: guests can set bit 0 of this synthetic MSR to enable the InvariantTSC feature. After setting the synthetic MSR, CPUID will enumerate support for InvariantTSC. [Regression Potential] If the patches fail to enable support for Invariant TSC or doesn't set the TSC clocksource as the default when Invariant TSC is available, while this would be an error it wouldn't be a regression. Possibility of finding problems using the TSC clocksource once support has been enabled. a 4.15 test kernel was sent to Microsoft for testing. Result came back verified to allow enabling support for Invariant TSC and there was no report of known regression. The 4.15, 5.3, & 5.4 kernels with patches applied were boot tested and verified no changes to dmesg logs relating to clocksource or tsc. tsc autotest ran successfully on the 4.15 before and after applying the requested patches. We are no longer interested in applying to Eoan/linux-azure (5.3) and only targeted to apply the patches to bionic/azure-4.15 and focal/azure. Changes since v1: More testing was done by microsoft and myself. Results are included in the Bug and cover letter. Also brought the Focal and Bionic patches together into one patch series. Bionic/azure-4.15: Andrea Parri (2): x86/hyperv: Allow guests to enable InvariantTSC x86/hyperv: Set TSC clocksource as default w/ InvariantTSC arch/x86/hyperv/hv_init.c | 13 +++++++++++-- arch/x86/include/asm/hyperv-tlfs.h | 5 +++++ arch/x86/kernel/cpu/mshyperv.c | 7 ++++++- 3 files changed, 22 insertions(+), 3 deletions(-) Focal/azure-5.3: Andrea Parri (2): x86/hyperv: Allow guests to enable InvariantTSC clocksource/drivers/hyper-v: Set TSC clocksource as default w/ InvariantTSC arch/x86/include/asm/hyperv-tlfs.h | 5 +++++ arch/x86/kernel/cpu/mshyperv.c | 7 ++++++- drivers/clocksource/hyperv_timer.c | 12 ++++++++++-- 3 files changed, 21 insertions(+), 3 deletions(-) Acked-by: Thadeu Lima de Souza Cascardo Acked-by: Stefan Bader