Message ID | f9d0735903e74d1fd0480077fb52e3e352de818a.1542811666.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | c25e804dd852bc316b6c4dee53c9b2211d247468 |
Delegated to: | Michal Simek |
Headers | show |
Series | [U-Boot] arm: zynq: cse_qspi: Fix overwriting spi-rx-bus-width property | expand |
diff --git a/arch/arm/dts/zynq-cse-qspi-single.dts b/arch/arm/dts/zynq-cse-qspi-single.dts index 3252d6a44409..0d680dfc0688 100644 --- a/arch/arm/dts/zynq-cse-qspi-single.dts +++ b/arch/arm/dts/zynq-cse-qspi-single.dts @@ -7,6 +7,6 @@ #include "zynq-cse-qspi.dtsi" -&qspi { +&flash0 { spi-rx-bus-width = <4>; }; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 2b169468b06d..65af4081ff4f 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -59,7 +59,7 @@ #address-cells = <1>; #size-cells = <0>; num-cs = <1>; - flash@0 { + flash0: flash@0 { compatible = "n25q128a11"; reg = <0x0>; spi-tx-bus-width = <1>;