From patchwork Thu Nov 2 18:50:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 833497 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="KOz+KDAf"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3ySZ7813h7z9sNc for ; Fri, 3 Nov 2017 05:56:20 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D2A91C21E10; Thu, 2 Nov 2017 18:51:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 76507C21DBB; Thu, 2 Nov 2017 18:50:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9BB8EC21D7C; Thu, 2 Nov 2017 18:50:43 +0000 (UTC) Received: from mail-wr0-f194.google.com (mail-wr0-f194.google.com [209.85.128.194]) by lists.denx.de (Postfix) with ESMTPS id A0904C21DC1 for ; Thu, 2 Nov 2017 18:50:39 +0000 (UTC) Received: by mail-wr0-f194.google.com with SMTP id u40so465328wrf.10 for ; Thu, 02 Nov 2017 11:50:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=SNvUbbTSUJ3SvxuodQNxlr2fYgOEsrTxPW3u9amy2yw=; b=KOz+KDAfNZBQccjX5VN3qO/QbU4Wu1YypurPdRtgx9vWEOJdhkfyNNdOJDvxmTZCOc H6BMgcsJDs9mOquZQHi51uihS+vSW/nwCwQOqrJeluAwDHpQtryX9EXwn54J2j+49MU0 FmE46YKPElzzdNmNxFaY2ln+067nM3SZ2PoL7CBhARXVTTvSFPo7UMW1e3bUwNK/6U37 ev2nRx1Jy5nY1wbGsXi/7LJi66pHScgQBKIrZCFrMyPS9PA4d4oK7m8ds8o3b85ZfmhA qJ6D5oAOwOG997VrraoaVQtJxNLtlByNsFq47uyhnioJyeKjN3ttJrco5QKcnuRwUtRH NcOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references; bh=SNvUbbTSUJ3SvxuodQNxlr2fYgOEsrTxPW3u9amy2yw=; b=bggVjsT+dE41oRKH9mBw12nFrGzOK4ACTYiGTvjtL3P6gNTv7kQ202NR2K9w8WXHHK 9bn6r12zVSi61r8hzKKHIJb/BzdhqsJEyFp9JXbH56vUVN2i/G/zG4mjrenMfcQ4Tzf6 6iLNTbTmuxCGX2sOSEAx8y6Y+p7Ox2rfp4nKuKpDdZ6Qlehv8sSl67xoEygkz3AmYAka 9/QUvnNnAg9nbvG31H/k06kyhiqckuKpkdxWejuLH+qNl78X/OWgWajQC++2fttfQfaJ ZL5Il20EO6O3iSxLEn4S1U0Ffbex3tR9wKAJr9LsHYokB4YevoJihNuhN/NLXY1BNAWT cdzg== X-Gm-Message-State: AMCzsaWmtl/DTdfJ1WrSA9d65+VFykwn52ImqUZpA/ckeW909uOgJKjR jeTCJO1dK+67HyxK3fCv07J+tkb0 X-Google-Smtp-Source: ABhQp+Rw0/7+hTtkbr9A/wsiqKc6O5p24OBPP2XbgU/m5/wR0ZLGJSLeKgZWARoetpgroOKGJXc3tw== X-Received: by 10.223.132.6 with SMTP id 6mr3750129wrf.93.1509648639061; Thu, 02 Nov 2017 11:50:39 -0700 (PDT) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id b76sm303740wmg.9.2017.11.02.11.50.38 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 02 Nov 2017 11:50:38 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de Date: Thu, 2 Nov 2017 19:50:26 +0100 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: <6f15552ab6f5e5327991a365a9ff1cb8d122fe62.1509648620.git.michal.simek@xilinx.com> References: <6f15552ab6f5e5327991a365a9ff1cb8d122fe62.1509648620.git.michal.simek@xilinx.com> In-Reply-To: <6f15552ab6f5e5327991a365a9ff1cb8d122fe62.1509648620.git.michal.simek@xilinx.com> References: <6f15552ab6f5e5327991a365a9ff1cb8d122fe62.1509648620.git.michal.simek@xilinx.com> Cc: Jernej Skrabec , Maxime Ripard Subject: [U-Boot] [PATCH 9/9] arm: zynq: Add board support for cc108 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" cc108 board is wiring uart via PL which is good platform for SPL fpga support. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-cc108.dts | 116 +++++++++++++++++++++++++++++++++++++++++++ configs/zynq_cc108_defconfig | 54 ++++++++++++++++++++ 3 files changed, 171 insertions(+) create mode 100644 arch/arm/dts/zynq-cc108.dts create mode 100644 configs/zynq_cc108_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6db64f91016c..565e679b182b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -124,6 +124,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \ uniphier-sld8-ref.dtb dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ + zynq-cc108.dtb \ zynq-zc706.dtb \ zynq-zed.dtb \ zynq-zybo.dtb \ diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts new file mode 100644 index 000000000000..a55e82b2102c --- /dev/null +++ b/arch/arm/dts/zynq-cc108.dts @@ -0,0 +1,116 @@ +/* + * Xilinx CC108 board DTS + * + * (C) Copyright 2007-2013 Xilinx, Inc. + * (C) Copyright 2007-2013 Michal Simek + * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd + * + * Michal SIMEK + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart0; + spi0 = &qspi; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x20000000>; + }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + + usb_phy1: phy1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + }; +}; + +&qspi { + status = "okay"; + is-dual = <0>; + num-cs = <1>; + flash@0 { /* 16 MB */ + compatible = "n25q128a11"; + reg = <0x0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot-bs"; + reg = <0x0 0x400000>; /* 4MB */ + }; + partition@0x400000 { + label = "qspi-linux"; + reg = <0x400000 0x400000>; /* 4MB */ + }; + partition@0x800000 { + label = "qspi-rootfs"; + reg = <0x800000 0x400000>; /* 4MB */ + }; + partition@0xc00000 { + label = "qspi-devicetree"; + reg = <0xc00000 0x100000>; /* 1MB */ + }; + partition@0xd00000 { + label = "qspi-scratch"; + reg = <0xd00000 0x200000>; /* 2MB */ + }; + partition@0xf00000 { + label = "qspi-uboot-env"; + reg = <0xf00000 0x100000>; /* 1MB */ + }; + }; +}; + +&sdhci1 { + status = "okay"; + broken-cd ; + wp-inverted ; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy1>; +}; diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig new file mode 100644 index 000000000000..7927017ae1aa --- /dev/null +++ b/configs/zynq_cc108_defconfig @@ -0,0 +1,54 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cc108" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Zynq> " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y