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[U-Boot,V2,2/8] sun8i: Add CCI-400 definitions

Message ID e588bb55cf4d7b547269f59e866067fa.squirrel@vali.starlink.edu
State Superseded
Delegated to: Hans de Goede
Headers show

Commit Message

Timothy Pearson May 17, 2016, 7:35 p.m. UTC 
Multi-cluster systems require basic initialization of the
cache coherent interconnect to enable SMP via PSCI.  Add
the requisite definitions for general use.

Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
---
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h |  3 +++
 arch/arm/include/asm/cci.h                  | 10 ++++++++++
 2 files changed, 13 insertions(+)
 create mode 100644 arch/arm/include/asm/cci.h
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Patch

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 65c0441..848e13c 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -18,6 +18,9 @@ 
 #define SUNXI_SRAM_D_BASE		0x00010000	/* 4 kiB */
 #define SUNXI_SRAM_B_BASE		0x00020000	/* 64 kiB (secure) */

+#define SUNXI_CPUXCFG_BASE		0x01700000
+#define SUNXI_CCI400_BASE		0x01790000
+
 #define SUNXI_SRAMC_BASE		0x01c00000
 #define SUNXI_DRAMC_BASE		0x01c01000
 #define SUNXI_DMA_BASE			0x01c02000
diff --git a/arch/arm/include/asm/cci.h b/arch/arm/include/asm/cci.h
new file mode 100644
index 0000000..19eae99
--- /dev/null
+++ b/arch/arm/include/asm/cci.h
@@ -0,0 +1,10 @@ 
+#ifndef __CCI_H__
+#define __CCI_H__
+
+/* Register offsets for the ARM cache coherent interconnect (CCI) */
+
+#define CCI400_DVM_MESSAGE_REQ_EN	0x00000002
+#define CCI400_SNOOP_REQ_EN		0x00000001
+#define CCI400_SHA_ORD_NON_SHAREABLE	0x00000002
+
+#endif /* __CCI_H__ */