From patchwork Wed Mar 25 12:07:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanchayan Maity X-Patchwork-Id: 454378 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id DA78014007F for ; Wed, 25 Mar 2015 23:33:41 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=W+O6PSgA; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 17521B37B3; Wed, 25 Mar 2015 13:33:32 +0100 (CET) X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id v7GdtA6BZnVq; Wed, 25 Mar 2015 13:33:31 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F04E6A7423; Wed, 25 Mar 2015 13:33:05 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CD14C4A036 for ; Wed, 25 Mar 2015 13:10:35 +0100 (CET) X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uDiifNHUJ9Oj for ; Wed, 25 Mar 2015 13:10:34 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f53.google.com (mail-pa0-f53.google.com [209.85.220.53]) by theia.denx.de (Postfix) with ESMTPS id 885B94A044 for ; Wed, 25 Mar 2015 13:10:09 +0100 (CET) Received: by pagj7 with SMTP id j7so27117713pag.2 for ; Wed, 25 Mar 2015 05:10:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=WM5p2MVIyLVWjc7irJVpJhDnPpzOxiOCBmj+nWUJLP8=; b=W+O6PSgAONvFQet5CsLBr6qnY4WPW3BP5gyZjNsoeJKHGQkv1D2J5oizM5JV+y84Ly PLsc4qtNfeBQ8v/NzFfBgueg9ScJQHr0jyCuy0vWY7GnTz23SSKjXpOWhxicN/JXEED6 TaOk6D08zVM57gXfAGDwQJl210HJnPsSy+y+KewoXsd/MWUSigyjhr/RxqOS6W9VFDpA /+VDPiaVQlJW6Sre6BqTKEV2IRLnxvOb7Ie/qfZFiWDwg8xo90YKD78Xes7c1fT++FN6 cTOFHXXhgJ1/RljYnDePeJ0zsuMQr7h7CK8wwlrV0/ECu43GJ21/G7vYLoiQi40bho07 mIiA== X-Received: by 10.66.241.36 with SMTP id wf4mr17055212pac.8.1427285408130; Wed, 25 Mar 2015 05:10:08 -0700 (PDT) Received: from localhost (triband-mum-120.62.191.176.mtnl.net.in. [120.62.191.176]) by mx.google.com with ESMTPSA id km11sm2273425pbd.90.2015.03.25.05.10.05 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Mar 2015 05:10:06 -0700 (PDT) From: Sanchayan Maity To: u-boot@lists.denx.de, sbabic@denx.de Date: Wed, 25 Mar 2015 17:37:29 +0530 Message-Id: X-Mailer: git-send-email 2.3.3 In-Reply-To: References: In-Reply-To: References: X-Mailman-Approved-At: Wed, 25 Mar 2015 13:32:42 +0100 Cc: marek@denx.de, trini@konsulko.com, Sanchayan Maity , marcel@ziswiler.com Subject: [U-Boot] [PATCH 4/6] ARM: vf610: Enable caches X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Agner Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from. Signed-off-by: Stefan Agner Signed-off-by: Sanchayan Maity --- arch/arm/cpu/armv7/vf610/generic.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index 3bdc221..1bb9b8e 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -342,3 +342,19 @@ int get_clocks(void) #endif return 0; } + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ +#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) + enum dcache_option option = DCACHE_WRITETHROUGH; +#else + enum dcache_option option = DCACHE_WRITEBACK; +#endif + dcache_enable(); + icache_enable(); + + /* Enable caching on OCRAM */ + mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); +} +#endif