Message ID | d3f0bdb0-62b1-4c96-b301-6ae1a2b54bdd@ATCPCS12.andestech.com |
---|---|
State | Accepted |
Delegated to: | Tom Rini |
Headers | show |
Series | [U-Boot] Pull request: u-boot-riscv/master | expand |
On Tue, Jan 15, 2019 at 03:16:39PM +0800, uboot@andestech.com wrote: > Hi Tom, > > Please pull some riscv updates: > 1. Improve cache implementation. > 2. Fix and improve standalone applications > > https://travis-ci.org/rickchen36/u-boot-riscv/builds/479684449 > > Thanks > > Rick > > > The following changes since commit d3689267f92c5956e09cc7d1baa4700141662bff: > > Prepare v2019.01 (2019-01-14 17:02:36 -0500) > > are available in the Git repository at: > > git://git.denx.de/u-boot-riscv.git > > for you to fetch changes up to 91882c472d8c0aef4db699d3f2de55bf43d4ae4b: > > riscv: qemu: define standalone load address (2019-01-15 09:36:31 +0800) > Applied to u-boot/master, thanks!