| Message ID | d02eb0a7-201e-4463-0ea2-20d3245c65da@gmail.com |
|---|---|
| State | Accepted |
| Commit | 2c2d782556e4f5d9483679d1293d8436892e9fed |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | [v2,1/7] arm: dts: rockchip: rk3288: move io-domains nodes | expand |
On 2023/3/16 02:34, Johan Jonker wrote: > The rk3288 pwm nodes synced from Linux make use of PCLK_RKPWM > instead of PCLK_PWM. They have the same pclk_cpu parent, > so add PCLK_RKPWM to rk3288_clk_get_rate(). > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > Reviewed-by: Simon Glass <sjg@chromium.org> > Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > drivers/clk/rockchip/clk_rk3288.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c > index 3b29992c..ef744c06 100644 > --- a/drivers/clk/rockchip/clk_rk3288.c > +++ b/drivers/clk/rockchip/clk_rk3288.c > @@ -778,6 +778,7 @@ static ulong rk3288_clk_get_rate(struct clk *clk) > case PCLK_I2C5: > return gclk_rate; > case PCLK_PWM: > + case PCLK_RKPWM: > return PD_BUS_PCLK_HZ; > case SCLK_SARADC: > new_rate = rockchip_saradc_get_clk(priv->cru); > -- > 2.20.1 >
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 3b29992c..ef744c06 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -778,6 +778,7 @@ static ulong rk3288_clk_get_rate(struct clk *clk) case PCLK_I2C5: return gclk_rate; case PCLK_PWM: + case PCLK_RKPWM: return PD_BUS_PCLK_HZ; case SCLK_SARADC: new_rate = rockchip_saradc_get_clk(priv->cru);