| Message ID | c6fc7f5dafe97af504021e5bb2700acaafdf193b.1438779080.git.michal.simek@xilinx.com |
|---|---|
| State | Accepted |
| Delegated to: | Michal Simek |
| Headers | show |
diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 60d7d20e17c8..f90cca36aa72 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -191,4 +191,9 @@ void enable_caches(void) set_sctlr(get_sctlr() | CR_C); } + +u64 *arch_get_page_table(void) +{ + return (u64 *)(gd->arch.tlb_addr + 0x3000); +} #endif
Based on the patch: "armv8: caches: Added routine to set non cacheable region" (sha1: dad17fd51027ad02ac8f02deed186d08109d61fd) it is necessary to add platform specific hook. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm/cpu/armv8/zynqmp/cpu.c | 5 +++++ 1 file changed, 5 insertions(+)