From patchwork Tue May 10 12:18:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?V2VpamllIEdhbyAo6auY5oOf5p2wKQ==?= X-Patchwork-Id: 1629125 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KyHQJ0srGz9sGF for ; Tue, 10 May 2022 22:28:40 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3AC0D842C7; Tue, 10 May 2022 14:28:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 56CF78429C; Tue, 10 May 2022 14:27:54 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,RDNS_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.2 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4FBAE842B7 for ; Tue, 10 May 2022 14:19:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=weijie.gao@mediatek.com X-UUID: 05db7a74bdb740b08f307c4e42c8be21-20220510 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4, REQID:5fe5fea0-7842-47d7-92f6-39e7bddecb9f, OB:-327 68,LOB:0,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:-32768,SF:-32768,FILE:0,RULE :Release_Ham,ACTION:release,TS:-20 X-CID-META: VersionHash:faefae9, CLOUDID:6ec248b3-56b5-4c9e-8d83-0070b288eb6a, C OID:nil,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: 05db7a74bdb740b08f307c4e42c8be21-20220510 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1177847845; Tue, 10 May 2022 20:18:46 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 10 May 2022 20:18:45 +0800 Received: from mcddlt001.gcn.mediatek.inc (10.19.240.15) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 10 May 2022 20:18:44 +0800 From: Weijie Gao To: CC: GSS_MTK_Uboot_upstream , Weijie Gao Subject: [PATCH v4 07/25] doc: mediatek: add documentation for mt7621 reference boards Date: Tue, 10 May 2022 20:18:43 +0800 Message-ID: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: MIME-Version: 1.0 X-MTK: N X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean The MT7621 requires external binary blob being executed during u-boot's boot-up flow. It's necessary to provide a guide here for users to correctly build the u-boot. Signed-off-by: Weijie Gao --- v4 changes: new --- doc/board/mediatek/mt7621.rst | 48 +++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 doc/board/mediatek/mt7621.rst diff --git a/doc/board/mediatek/mt7621.rst b/doc/board/mediatek/mt7621.rst new file mode 100644 index 0000000000..4f400a4ca4 --- /dev/null +++ b/doc/board/mediatek/mt7621.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: GPL-2.0 + +mt7621_rfb/mt7621_nand_rfb +========================== + +U-Boot for the MediaTek MT7621 boards + +Quick Start +----------- + +- Get the DDR initialization binary blob +- Configure CPU and DDR parameters +- Build U-Boot + +Get the DDR initialization binary blob +-------------------- + +Download one from: + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin + +mt7621_stage_sram_noprint.bin has removed all output logs. To use this one, +download and rename it to mt7621_stage_sram.bin + +Put the binary blob to the u-boot build directory. + +Configure CPU and DDR parameters +-------------------------------- + +menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration + +Select the correct DDR timing parameters for your board. The size shown here +must match the DDR size of you board. + +The frequency of CPU and DDR can also be adjusted. + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=mipsel-linux- + $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig + $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin + $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin + $ make O=build + +Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash.