From patchwork Tue Nov 6 08:47:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryder Lee X-Patchwork-Id: 993542 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42q3GH4Clsz9sCQ for ; Tue, 6 Nov 2018 19:52:39 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3E001C226A7; Tue, 6 Nov 2018 08:52:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.3 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RDNS_NONE, UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EC49EC2271D; Tue, 6 Nov 2018 08:47:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C2DBAC226E0; Tue, 6 Nov 2018 08:47:45 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lists.denx.de (Postfix) with ESMTP id 7CEE3C226AC for ; Tue, 6 Nov 2018 08:47:36 +0000 (UTC) X-UUID: 4109f5ef4a6e4e25b82c194ba086e698-20181106 X-UUID: 4109f5ef4a6e4e25b82c194ba086e698-20181106 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1385127033; Tue, 06 Nov 2018 16:47:32 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 6 Nov 2018 16:47:31 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 6 Nov 2018 16:47:31 +0800 From: Ryder Lee To: Tom Rini , Simon Glass , Albert Aribaud Date: Tue, 6 Nov 2018 16:47:22 +0800 Message-ID: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: MIME-Version: 1.0 X-MTK: N Cc: Ryder Lee , Steven Liu , Roy Luo , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v4 14/18] serial: 16550: allow the driver to support MediaTek serial X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds an extra operation in ns16550.c to suuport MediaTek SoCs as we have a highspeed register which influences the calcualtion of the divisor. Note that we don't support the baudrate greater than 115200 currently. Signed-off-by: Ryder Lee Tested-by: Matthias Brugger Reviewed-by: Simon Glass --- Changes since v4: None @Simon We have tried the compatible string, but it made the ns16550 driver more complicated. To use the compatible string we have to add a new field in ns16550_platdata, and change the flow of ns16550_serial_probe(). Moreover, it's totally useless for debug uart. At present using a macro is the easiest way here. What do you think? --- drivers/serial/ns16550.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index f9041aa..f5410af 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -148,6 +148,13 @@ int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) { +#ifdef CONFIG_ARCH_MEDIATEK + /* + * MediaTek UARTs has an extra highspeed register. + * We need to clear it if baudrate <= 115200. + */ + serial_out(0, &com_port->reg9); +#endif serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); serial_out(baud_divisor & 0xff, &com_port->dll); serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); @@ -261,6 +268,9 @@ static inline void _debug_uart_init(void) serial_dout(&com_port->mcr, UART_MCRVAL); serial_dout(&com_port->fcr, UART_FCR_DEFVAL); +#ifdef CONFIG_ARCH_MEDIATEK + serial_dout(&com_port->reg9, 0); +#endif serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); serial_dout(&com_port->dll, baud_divisor & 0xff); serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);