From patchwork Fri Oct 12 07:01:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryder Lee X-Patchwork-Id: 982874 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42Wf8j2l1Xz9s2P for ; Fri, 12 Oct 2018 18:09:25 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id EEBD2C21DB6; Fri, 12 Oct 2018 07:07:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.3 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RDNS_NONE, UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7D7BCC21BE5; Fri, 12 Oct 2018 07:01:45 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9D5C9C21C4A; Fri, 12 Oct 2018 07:01:30 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lists.denx.de (Postfix) with ESMTP id A2670C21DEC for ; Fri, 12 Oct 2018 07:01:24 +0000 (UTC) X-UUID: a4570a1f316e48b48daae4cc4e789833-20181012 X-UUID: a4570a1f316e48b48daae4cc4e789833-20181012 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1992492829; Fri, 12 Oct 2018 15:01:15 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 12 Oct 2018 15:01:14 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 12 Oct 2018 15:01:14 +0800 From: Ryder Lee To: Tom Rini , Simon Glass , Albert Aribaud Date: Fri, 12 Oct 2018 15:01:02 +0800 Message-ID: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: MIME-Version: 1.0 X-TM-SNTS-SMTP: AE627D45E8A2621B1CE49F5693A0551B436C3C107766C9517EA4579F479A8E622000:8 X-MTK: N Cc: Ryder Lee , Steven Liu , Roy Luo , Sean Wang , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 13/18] power domain: MediaTek: add power domain driver for MT7623 SoC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This adds power domain (scpsys) support for MT7623 SoC. Signed-off-by: Ryder Lee Reviewed-by: Simon Glass --- drivers/power/domain/mtk-power-domain.c | 80 +++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/drivers/power/domain/mtk-power-domain.c b/drivers/power/domain/mtk-power-domain.c index 5ebeabd..8b97a16 100644 --- a/drivers/power/domain/mtk-power-domain.c +++ b/drivers/power/domain/mtk-power-domain.c @@ -14,8 +14,18 @@ #include #include +#include #include +#define SPM_VDE_PWR_CON 0x0210 +#define SPM_MFG_PWR_CON 0x0214 +#define SPM_ISP_PWR_CON 0x0238 +#define SPM_DIS_PWR_CON 0x023c +#define SPM_CONN_PWR_CON 0x0280 +#define SPM_BDP_PWR_CON 0x029c +#define SPM_ETH_PWR_CON 0x02a0 +#define SPM_HIF_PWR_CON 0x02a4 +#define SPM_IFR_MSC_PWR_CON 0x02a8 #define SPM_ETHSYS_PWR_CON 0x2e0 #define SPM_HIF0_PWR_CON 0x2e4 #define SPM_HIF1_PWR_CON 0x2e8 @@ -28,6 +38,15 @@ #define PWR_ON_2ND_BIT BIT(3) #define PWR_CLK_DIS_BIT BIT(4) +#define PWR_STATUS_CONN BIT(1) +#define PWR_STATUS_DISP BIT(3) +#define PWR_STATUS_MFG BIT(4) +#define PWR_STATUS_ISP BIT(5) +#define PWR_STATUS_VDEC BIT(7) +#define PWR_STATUS_BDP BIT(14) +#define PWR_STATUS_ETH BIT(15) +#define PWR_STATUS_HIF BIT(16) +#define PWR_STATUS_IFR_MSC BIT(17) #define PWR_STATUS_ETHSYS BIT(24) #define PWR_STATUS_HIF0 BIT(25) #define PWR_STATUS_HIF1 BIT(26) @@ -40,6 +59,7 @@ #define DCM_TOP_EN BIT(0) enum scp_domain_type { + SCPSYS_MT7623, SCPSYS_MT7629, }; @@ -61,6 +81,59 @@ struct scp_domain { struct scp_domain_data *data; }; +static struct scp_domain_data scp_domain_mt7623[] = { + [MT7623_POWER_DOMAIN_CONN] = { + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = SPM_CONN_PWR_CON, + .bus_prot_mask = BIT(8) | BIT(2), + }, + [MT7623_POWER_DOMAIN_DISP] = { + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = SPM_DIS_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .bus_prot_mask = BIT(2), + }, + [MT7623_POWER_DOMAIN_MFG] = { + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = SPM_MFG_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT7623_POWER_DOMAIN_VDEC] = { + .sta_mask = PWR_STATUS_VDEC, + .ctl_offs = SPM_VDE_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT7623_POWER_DOMAIN_ISP] = { + .sta_mask = PWR_STATUS_ISP, + .ctl_offs = SPM_ISP_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + }, + [MT7623_POWER_DOMAIN_BDP] = { + .sta_mask = PWR_STATUS_BDP, + .ctl_offs = SPM_BDP_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + }, + [MT7623_POWER_DOMAIN_ETH] = { + .sta_mask = PWR_STATUS_ETH, + .ctl_offs = SPM_ETH_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, + [MT7623_POWER_DOMAIN_HIF] = { + .sta_mask = PWR_STATUS_HIF, + .ctl_offs = SPM_HIF_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, + [MT7623_POWER_DOMAIN_IFR_MSC] = { + .sta_mask = PWR_STATUS_IFR_MSC, + .ctl_offs = SPM_IFR_MSC_PWR_CON, + }, +}; + static struct scp_domain_data scp_domain_mt7629[] = { [MT7629_POWER_DOMAIN_ETHSYS] = { .sta_mask = PWR_STATUS_ETHSYS, @@ -252,6 +325,9 @@ static int mtk_power_domain_hook(struct udevice *dev) scpd->type = (enum scp_domain_type)dev_get_driver_data(dev); switch (scpd->type) { + case SCPSYS_MT7623: + scpd->data = scp_domain_mt7623; + break; case SCPSYS_MT7629: scpd->data = scp_domain_mt7629; break; @@ -303,6 +379,10 @@ static int mtk_power_domain_probe(struct udevice *dev) static const struct udevice_id mtk_power_domain_ids[] = { { + .compatible = "mediatek,mt7623-scpsys", + .data = SCPSYS_MT7623, + }, + { .compatible = "mediatek,mt7629-scpsys", .data = SCPSYS_MT7629, },