From patchwork Wed Jul 15 08:23:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 495524 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 26AC91402BA for ; Wed, 15 Jul 2015 18:28:19 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=w7iKrfBr; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 12F114B7BA; Wed, 15 Jul 2015 10:25:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3dq0dG7IjFnw; Wed, 15 Jul 2015 10:25:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 30ED14B7CB; Wed, 15 Jul 2015 10:25:09 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D5D9C4B7C2 for ; Wed, 15 Jul 2015 10:25:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wF0STMrKng4R for ; Wed, 15 Jul 2015 10:25:04 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qk0-f170.google.com (mail-qk0-f170.google.com [209.85.220.170]) by theia.denx.de (Postfix) with ESMTPS id 0EED64B72F for ; Wed, 15 Jul 2015 10:24:49 +0200 (CEST) Received: by qkdl129 with SMTP id l129so23234901qkd.0 for ; Wed, 15 Jul 2015 01:24:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:from:to:subject:date:in-reply-to:references:mime-version :content-type; bh=ynmaZNcYdrNPF9YrOa/8O2rkM0lm3yvDrlh/fCqZ5wc=; b=w7iKrfBrWC0YnukJ0ZB2IvzzkpSX4YS3cBPlIi7WTYaQ2jiGdsVphWRZCxXhuXb+AV 9pp8Lh+PVqhp7vUwiWs0M0HJB2UDi+73zcr0jFx7vQuwm7JMt+70G5kx8ZuTyOxynyEG RzHz8nMom0UzxPbRxClcO9aMJdiJVcMwsoCmVA0VrmLdZsLr1pElITY8pfjELZRF2SrI aoYHS9gX/6iHkUnQKQRN8U85BydB7lvfhwn06PohizxqoDF7j/m6YtrCJfRtC4v1LXsk xnGFDev43IGv6gjW38tvU4UgAx8IV8wXGk5SOLPjcq2u4uRdJ8K3uNUDUOzEbVNiTdQU /vXA== X-Received: by 10.55.27.70 with SMTP id b67mr6303112qkb.86.1436948688510; Wed, 15 Jul 2015 01:24:48 -0700 (PDT) Received: from mail.hotmail.com (blu004-wss1s6.hotmail.com. [134.170.2.221]) by smtp.gmail.com with ESMTPSA id f207sm1884149qhc.41.2015.07.15.01.24.47 (version=TLSv1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Jul 2015 01:24:47 -0700 (PDT) Received: from BLU437-SMTP18 ([134.170.2.215]) by BLU004-WSS1S6.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.23008); Wed, 15 Jul 2015 01:24:46 -0700 X-TMN: [J8u+itKH7fDSYzmvReCMWdkgV2oJXLu2] Message-ID: From: Bin Meng To: Simon Glass , U-Boot Mailing List , Saket Sinha Date: Wed, 15 Jul 2015 16:23:46 +0800 X-Mailer: git-send-email 2.3.2 (Apple Git-55) In-Reply-To: <1436948627-1521-1-git-send-email-bmeng.cn@gmail.com> References: <1436948627-1521-1-git-send-email-bmeng.cn@gmail.com> X-OriginalArrivalTime: 15 Jul 2015 08:24:45.0033 (UTC) FILETIME=[B4900D90:01D0BED7] MIME-Version: 1.0 Subject: [U-Boot] [PATCH 09/10] x86: qemu: Enable writing MP table X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable writing MP table for QEMU boads (i440fx and q35). Signed-off-by: Bin Meng --- arch/x86/cpu/qemu/pci.c | 34 +++++++++++++++++++++++++++++++--- configs/qemu-x86_defconfig | 1 + 2 files changed, 32 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c index ab93e76..acbd922 100644 --- a/arch/x86/cpu/qemu/pci.c +++ b/arch/x86/cpu/qemu/pci.c @@ -13,6 +13,8 @@ DECLARE_GLOBAL_DATA_PTR; +static bool i440fx; + void board_pci_setup_hose(struct pci_controller *hose) { hose->first_busno = 0; @@ -61,7 +63,8 @@ int board_pci_post_scan(struct pci_controller *hose) * PCI device ID. */ device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID); - pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM; + i440fx = (device == PCI_DEVICE_ID_INTEL_82441); + pam = i440fx ? I440FX_PAM : Q35_PAM; /* * Initialize Programmable Attribute Map (PAM) Registers @@ -71,7 +74,7 @@ int board_pci_post_scan(struct pci_controller *hose) for (i = 0; i < PAM_NUM; i++) x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW); - if (device == PCI_DEVICE_ID_INTEL_82441) { + if (i440fx) { /* * Enable legacy IDE I/O ports decode * @@ -97,10 +100,35 @@ int board_pci_post_scan(struct pci_controller *hose) * board, it shows as device 2, while for Q35 and ICH9 chipset board, * it shows as device 1. */ - vga = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_VGA : Q35_VGA; + vga = i440fx ? I440FX_VGA : Q35_VGA; start = get_timer(0); ret = pci_run_vga_bios(vga, NULL, PCI_ROM_USE_NATIVE); debug("BIOS ran in %lums\n", get_timer(start)); return ret; } + +#ifdef CONFIG_GENERATE_MP_TABLE +int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq) +{ + u8 irq; + + if (i440fx) { + /* + * Not like most x86 platforms, the PIRQ[A-D] on PIIX3 are not + * connected to I/O APIC INTPIN#16-19. Instead they are routed + * to an irq number controled by the PIRQ routing register. + */ + irq = x86_pci_read_config8(PCI_BDF(bus, dev, func), + PCI_INTERRUPT_LINE); + } else { + /* + * ICH9's PIRQ[A-H] are not consecutive numbers from 0 to 7. + * PIRQ[A-D] still maps to [0-3] but PIRQ[E-H] maps to [8-11]. + */ + irq = pirq < 8 ? pirq + 16 : pirq + 12; + } + + return irq; +} +#endif diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 62c3f35..e579c36 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -3,6 +3,7 @@ CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" CONFIG_SMP=y CONFIG_MAX_CPUS=2 CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_MP_TABLE=y CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set