From patchwork Sat Jun 13 10:11:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 483835 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E92AC140290 for ; Sat, 13 Jun 2015 20:12:40 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=RZPsBifA; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5E1324B68A; Sat, 13 Jun 2015 12:12:22 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NGqGDFnF8A08; Sat, 13 Jun 2015 12:12:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2D22F4B652; Sat, 13 Jun 2015 12:12:17 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 57D794B689 for ; Sat, 13 Jun 2015 12:12:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rhoCcEGd8WEE for ; Sat, 13 Jun 2015 12:12:15 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f49.google.com (mail-pa0-f49.google.com [209.85.220.49]) by theia.denx.de (Postfix) with ESMTPS id 091664B694 for ; Sat, 13 Jun 2015 12:12:01 +0200 (CEST) Received: by pacgb13 with SMTP id gb13so5835736pac.1 for ; Sat, 13 Jun 2015 03:12:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:from:to:subject:date:in-reply-to:references:mime-version :content-type; bh=RhWp2WeeCpcewOU+e5sKl3ASDrBWF20fhfvUcFTudsk=; b=RZPsBifAjb1GokKxxNsA0AjxuGumLXbrYE6mRmVctxSu92p+NQ2OXY9ZqWaJbB9/FG I2XJ4NN2gKy91o7bwbb8n38m9J8JyjrkURc9LGDnrQiTRXsUe1N6e4ELP48NeROVi6YK tUs5IARtW30ycAq9dk4pK3OrnRxjTOsxUU3ry/yf2H8MiRf/1lI35RJyohCIChO884PE dJgRnI+JXO7lORkE2uMnPRweWizfbs3rWBZbhT8RH4Aoam7e9UOcWqgf1ECMr+oUNrJS FptcVv8V65C+jKwLVQaYkYcYE1pjrlWhXxkh09qgKtsArochvi/8YDn822auNgPVn8kU w2gQ== X-Received: by 10.70.127.231 with SMTP id nj7mr30842564pdb.63.1434190320304; Sat, 13 Jun 2015 03:12:00 -0700 (PDT) Received: from mail.hotmail.com (blu004-wss1s2.hotmail.com. [134.170.2.217]) by mx.google.com with ESMTPSA id da3sm6180978pdb.8.2015.06.13.03.11.59 (version=TLSv1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 13 Jun 2015 03:11:59 -0700 (PDT) Received: from BLU436-SMTP87 ([134.170.2.215]) by BLU004-WSS1S2.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.22751); Sat, 13 Jun 2015 03:11:58 -0700 X-TMN: [3ibz/KthekNUSS5OrryzkS5H6Yr3x5iu] Message-ID: From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Sat, 13 Jun 2015 18:11:30 +0800 X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1434190290-22908-1-git-send-email-bmeng.cn@gmail.com> References: <1434190290-22908-1-git-send-email-bmeng.cn@gmail.com> X-OriginalArrivalTime: 13 Jun 2015 10:11:57.0335 (UTC) FILETIME=[614B7270:01D0A5C1] MIME-Version: 1.0 Subject: [U-Boot] [PATCH v3 6/6] x86: crownbay: Add MP initialization X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Intel Crown Bay board has a TunnelCreek processor which supports hyper-threading. Add /cpus node in the crownbay.dts and enable the MP initialization. Signed-off-by: Bin Meng Acked-by: Simon Glass --- Changes in v3: None Changes in v2: - Move CONFIG_MAX_CPUS after CONFIG_SMP in crownbay_defconfig to match the order in Kconfig arch/x86/dts/crownbay.dts | 20 ++++++++++++++++++++ configs/crownbay_defconfig | 4 ++++ 2 files changed, 24 insertions(+) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index d68efda..1ec90cd 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -23,6 +23,26 @@ silent_console = <0>; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <0>; + intel,apic-id = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <1>; + intel,apic-id = <1>; + }; + + }; + gpioa { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index d3a370d..d21177d 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -2,6 +2,10 @@ CONFIG_X86=y CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="crownbay" CONFIG_TARGET_CROWNBAY=y +CONFIG_SMP=y +CONFIG_MAX_CPUS=2 CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_CMD_CPU=y CONFIG_CMD_NET=y CONFIG_OF_CONTROL=y +CONFIG_CPU=y