From patchwork Sun May 22 03:59:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wills Wang X-Patchwork-Id: 624892 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rC7Jk5T4bz9t3k for ; Sun, 22 May 2016 14:01:26 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 63B28A7544; Sun, 22 May 2016 06:01:21 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AI-Wwg_rayTQ; Sun, 22 May 2016 06:01:21 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 27D70B37FA; Sun, 22 May 2016 06:01:20 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D2855A7514 for ; Sun, 22 May 2016 06:01:13 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YTbgfxwWNAcL for ; Sun, 22 May 2016 06:01:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from BLU004-OMC1S34.hotmail.com (blu004-omc1s34.hotmail.com [65.55.116.45]) by theia.denx.de (Postfix) with ESMTPS id 1D8CA4BA3B for ; Sun, 22 May 2016 06:01:09 +0200 (CEST) Received: from BLU436-SMTP22 ([65.55.116.7]) by BLU004-OMC1S34.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.23008); Sat, 21 May 2016 21:01:09 -0700 X-TMN: [2uTw4p7ibBXquQOgwcDWZaGxbVYlO8Jw] X-Originating-Email: [wills.wang@live.com] Message-ID: From: Wills Wang To: u-boot@lists.denx.de Date: Sun, 22 May 2016 11:59:50 +0800 X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463889595-15333-1-git-send-email-wills.wang@live.com> References: <1463889595-15333-1-git-send-email-wills.wang@live.com> X-OriginalArrivalTime: 22 May 2016 04:01:07.0610 (UTC) FILETIME=[9186D7A0:01D1B3DE] MIME-Version: 1.0 Cc: marex@denx.de Subject: [U-Boot] [PATCH V2 2/7] mips: ath79: ar933x: Fix ethernet PHY mismatch X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We need reset the Ethernet Switch analog part before operation, or the build-in Ethernet PHY don't work. Signed-off-by: Wills Wang --- arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 + arch/mips/mach-ath79/reset.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h index a8e51cb..dabcad0 100644 --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h @@ -660,6 +660,7 @@ #define AR933X_RESET_GE1_MDIO BIT(23) #define AR933X_RESET_GE0_MDIO BIT(22) +#define AR933X_RESET_ETH_SWITCH_ANALOG BIT(14) #define AR933X_RESET_GE1_MAC BIT(13) #define AR933X_RESET_WMAC BIT(11) #define AR933X_RESET_GE0_MAC BIT(9) diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c index 188eccb..a88bcbc 100644 --- a/arch/mips/mach-ath79/reset.c +++ b/arch/mips/mach-ath79/reset.c @@ -81,7 +81,8 @@ static int eth_init_ar933x(void) MAP_NOCACHE); const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO | AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO | - AR933X_RESET_ETH_SWITCH; + AR933X_RESET_ETH_SWITCH | + AR933X_RESET_ETH_SWITCH_ANALOG; /* Clear MDIO slave EN bit. */ clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));