From patchwork Tue Jul 21 12:15:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 498183 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E67D41402D7 for ; Tue, 21 Jul 2015 22:19:12 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=G2/gaCi+; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4D7A24B62C; Tue, 21 Jul 2015 14:19:11 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1EU56bGoUUBW; Tue, 21 Jul 2015 14:19:10 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 28F574B61D; Tue, 21 Jul 2015 14:19:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC47F4B616 for ; Tue, 21 Jul 2015 14:16:23 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id y4YcvpQHbHZ5 for ; Tue, 21 Jul 2015 14:16:23 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-oi0-f48.google.com (mail-oi0-f48.google.com [209.85.218.48]) by theia.denx.de (Postfix) with ESMTPS id 144254B624 for ; Tue, 21 Jul 2015 14:16:14 +0200 (CEST) Received: by oigd21 with SMTP id d21so81913566oig.1 for ; Tue, 21 Jul 2015 05:16:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:from:to:subject:date:in-reply-to:references:mime-version :content-type; bh=NfTU4mk4UkDRSVTDBckk85MpMecPec3xLHYf0pMUhPs=; b=G2/gaCi+0HQHjqQVb/KO/OEwap1UaRz1ubCNrrOWmwOh3oHajhorPW43wY8Gwd7A3w tW4lP7oN2X9tI1XX05WngjS19QIoN0HTnyM7JT7ZUOr4I10EQzfPZ6ygxyWAuO5ZD3W6 KqgR84c/rHG8gEDZLD/9vg+Z4cutiWLq9NzwgvGLbCXVtGyG/OLdhB516nGxWSXwHQ77 pPrdz/ZPrYPZwoFmGfRrt5H4TihFc7i377QIJ0Egn3jA+ATCPo9Ti8c9MWaodFkDdV4g Ymuoh+vli/EUoJpI0FL2BzsRz5axVbKsu3vdYSlRzTQMGvyix9mNzNS55TYUPx7cirvR qXNg== X-Received: by 10.60.115.1 with SMTP id jk1mr32331357oeb.2.1437480972945; Tue, 21 Jul 2015 05:16:12 -0700 (PDT) Received: from mail.hotmail.com (blu004-wss1s5.hotmail.com. [134.170.2.220]) by smtp.gmail.com with ESMTPSA id s185sm9762123oia.21.2015.07.21.05.16.12 (version=TLSv1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Jul 2015 05:16:12 -0700 (PDT) Received: from BLU436-SMTP188 ([134.170.2.215]) by BLU004-WSS1S5.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.23008); Tue, 21 Jul 2015 05:16:11 -0700 X-TMN: [IHzVyc+DawzvG+28DwPhMkgMdCBuvBXC] Message-ID: From: Bin Meng To: Simon Glass , U-Boot Mailing List , Saket Sinha Date: Tue, 21 Jul 2015 20:15:26 +0800 X-Mailer: git-send-email 2.3.2 (Apple Git-55) In-Reply-To: <1437480926-840-1-git-send-email-bmeng.cn@gmail.com> References: <1437480926-840-1-git-send-email-bmeng.cn@gmail.com> X-OriginalArrivalTime: 21 Jul 2015 12:16:10.0262 (UTC) FILETIME=[07485B60:01D0C3AF] MIME-Version: 1.0 Subject: [U-Boot] [PATCH v2 7/7] x86: Reserve PCIe ECAM address range in the E820 table X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We should mark PCIe ECAM address range in the E820 table as reserved otherwise kernel will not attempt to use ECAM. Signed-off-by: Bin Meng Acked-by: Simon Glass --- Changes in v2: - New patch to reserve PCIe ECAM address range in the E820 table arch/x86/Kconfig | 10 ++++++++++ arch/x86/lib/fsp/fsp_dram.c | 6 ++++++ arch/x86/lib/zimage.c | 5 ++++- 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index cbbaa4f..e8968a7 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -369,4 +369,14 @@ config PCIE_ECAM_BASE assigned to PCI devices - i.e. the memory and prefetch regions, as passed to pci_set_region(). +config PCIE_ECAM_SIZE + hex + default 0x10000000 + help + This is the size of memory-mapped address of PCI configuration space, + which is only available through the Enhanced Configuration Access + Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, + so a default 0x10000000 size covers all of the 256 buses which is the + maximum number of PCI buses as defined by the PCI specification. + endmenu diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 4c0a7c8..28552fa 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -77,5 +77,11 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) num_entries++; } + /* Mark PCIe ECAM address range as reserved */ + entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE; + entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE; + entries[num_entries].type = E820_RESERVED; + num_entries++; + return num_entries; } diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 144471c..a1ec57e 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -61,8 +61,11 @@ __weak unsigned install_e820_map(unsigned max_entries, entries[2].addr = ISA_END_ADDRESS; entries[2].size = gd->ram_size - ISA_END_ADDRESS; entries[2].type = E820_RAM; + entries[3].addr = CONFIG_PCIE_ECAM_BASE; + entries[3].size = CONFIG_PCIE_ECAM_SIZE; + entries[3].type = E820_RESERVED; - return 3; + return 4; } static void build_command_line(char *command_line, int auto_boot)