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[U-Boot] powerpc/corenet_ds: Change CONFIG_SYS_DCSRBAR_PHYS

Message ID B578782695EC1545A6E9231C72F8ED2B09325D@MEN-EX2.intra.men.de
State Not Applicable
Delegated to: Kumar Gala
Headers show

Commit Message

Trübenbach, Ralf May 2, 2011, 12:59 p.m. UTC
This patch changes DCSR's 36 bit physical address from F_0000_0000 
to F_F000_0000.

Most 36bit physical addresses (except SDRAM/PCI MEM...) are at 
F_0000_0000 + <32BIT_ADDR>. To be consistent we should 
change CONFIG_SYS_DCSRBAR_PHYS.

Tested at P4080_DS eval board.

Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
---

--
Best Regards/Mit freundlichen Gruessen
Ralf Trübenbach
------------------------------------------------------------------------
Ralf Trübenbach, Software Design
MEN Mikro Elektronik GmbH
Neuwieder Straße 5-7
90411 Nürnberg, Germany
Phone +49-911-99 33 5-0
Fax +49-911-99 33 5-910
Ralf.Truebenbach@men.de
www.men.de
MEN Mikro Elektronik GmbH - Manfred Schmitz (CTO), Udo Fuchs (CFO) 
- Handelsregister/Trade Register AG Nürnberg HRB 5540

Comments

Kumar Gala May 2, 2011, 2:51 p.m. UTC | #1
On May 2, 2011, at 7:59 AM, Trübenbach, Ralf wrote:

> This patch changes DCSR's 36 bit physical address from F_0000_0000 
> to F_F000_0000.
> 
> Most 36bit physical addresses (except SDRAM/PCI MEM...) are at 
> F_0000_0000 + <32BIT_ADDR>. To be consistent we should 
> change CONFIG_SYS_DCSRBAR_PHYS.
> 
> Tested at P4080_DS eval board.
> 
> Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
> Cc: Kumar Gala <kumar.gala@freescale.com>
> Cc: Andy Fleming <afleming@gmail.com>
> ---

NAK.  I see no reason to change the physical memory map.

- k
diff mbox

Patch

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index d1cda15..a80aeac 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -134,9 +134,11 @@ 
 #endif
 #define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */
 
-#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_DCSRBAR		0xf0000000
-#define CONFIG_SYS_DCSRBAR_PHYS		0xf00000000ull
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_DCSRBAR_PHYS		0xff0000000ull
+#else
+#define CONFIG_SYS_DCSRBAR_PHYS		CONFIG_SYS_DCSRBAR
 #endif
 
 /* EEPROM */