From patchwork Tue Nov 22 14:41:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Robert_Deli=C3=ABn?= X-Patchwork-Id: 127090 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 41170B6EE8 for ; Wed, 23 Nov 2011 01:41:59 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ACD742835A; Tue, 22 Nov 2011 15:41:56 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CUTTjIwyLIYE; Tue, 22 Nov 2011 15:41:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0022A28332; Tue, 22 Nov 2011 15:41:53 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6E09228332 for ; Tue, 22 Nov 2011 15:41:52 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qf1oeiYIm7wk for ; Tue, 22 Nov 2011 15:41:51 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smarthost.danego.net (smarthost.danego.net [195.246.116.68]) by theia.denx.de (Postfix) with ESMTP id DA85628331 for ; Tue, 22 Nov 2011 15:41:50 +0100 (CET) Received: from smtp.danego.net (smtp.danego.net [195.246.116.61]) by smarthost.danego.net (Postfix) with ESMTP id C3B511C281C8; Tue, 22 Nov 2011 16:04:12 +0100 (CET) From: =?iso-8859-1?Q?Robert_Deli=EBn?= To: "u-boot@lists.denx.de" Thread-Topic: [PATCH] M28: Added guarding for reserved bits in GPIO driver Thread-Index: AQHMqSS6FON4kQeJK0KKJDyIVGM27Q== Date: Tue, 22 Nov 2011 14:41:48 +0000 Message-ID: Accept-Language: en-GB, nl-NL, en-US Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [57.66.175.6] MIME-Version: 1.0 X-Spam: Subject: [U-Boot] [PATCH] M28: Added guarding for reserved bits in GPIO driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch fixes a small bug that allowed unintended manipulation of non-existing GPIO pins within a pin bank, clobbering reserved bits. Signed-off-by: Robert Deliën diff --git a/arch/arm/include/asm/arch-mx28/iomux.h b/arch/arm/include/asm/arch-mx28/iomux.h index 7abdf58..829d9a8 100644 --- a/arch/arm/include/asm/arch-mx28/iomux.h +++ b/arch/arm/include/asm/arch-mx28/iomux.h @@ -56,6 +56,12 @@ typedef u32 iomux_cfg_t; #define MXS_PAD_PULL_VALID_SHIFT 16 #define MXS_PAD_PULL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT) +#define MXS_BANK0_PINS 29 +#define MXS_BANK1_PINS 32 +#define MXS_BANK2_PINS 28 +#define MXS_BANK3_PINS 31 +#define MXS_BANK4_PINS 21 + #define PAD_MUXSEL_0 0 #define PAD_MUXSEL_1 1 #define PAD_MUXSEL_2 2 diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c index 539738b..fbc6da3 100644 --- a/drivers/gpio/mxs_gpio.c +++ b/drivers/gpio/mxs_gpio.c @@ -120,9 +120,34 @@ int gpio_direction_output(int gp, int value) int gpio_request(int gp, const char *label) { + int bank_pins; + if (PAD_BANK(gp) >= PINCTRL_BANKS) return -EINVAL; + switch(PAD_BANK(gp)) { + case 0: + bank_pins = MXS_BANK0_PINS; + break; + case 1: + bank_pins = MXS_BANK1_PINS; + break; + case 2: + bank_pins = MXS_BANK2_PINS; + break; + case 3: + bank_pins = MXS_BANK3_PINS; + break; + case 4: + bank_pins = MXS_BANK4_PINS; + break; + default: + bank_pins = 0; + } + + if (PAD_PIN(gp) >= bank_pins) + return -EINVAL; + return 0; }