diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 70f939869a..3d57466a63 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -77,6 +77,9 @@ config VENDOR_GOOGLE
 config VENDOR_INTEL
 	bool "Intel"
 
+config VENDOR_SLIMBOOTLOADER
+	bool "slimbootloader"
+
 endchoice
 
 # subarchitectures-specific options below
@@ -104,6 +107,7 @@ source "board/efi/Kconfig"
 source "board/emulation/Kconfig"
 source "board/google/Kconfig"
 source "board/intel/Kconfig"
+source "board/slimbootloader/Kconfig"
 
 # platform-specific options below
 source "arch/x86/cpu/baytrail/Kconfig"
@@ -116,6 +120,7 @@ source "arch/x86/cpu/qemu/Kconfig"
 source "arch/x86/cpu/quark/Kconfig"
 source "arch/x86/cpu/queensbay/Kconfig"
 source "arch/x86/cpu/tangier/Kconfig"
+source "arch/x86/cpu/slimbootloader/Kconfig"
 
 # architecture-specific options below
 
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 85fd5e616e..a5c0113fa4 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
 obj-$(CONFIG_INTEL_QUARK) += quark/
 obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
 obj-$(CONFIG_INTEL_TANGIER) += tangier/
+obj-$(CONFIG_SYS_SLIMBOOTLOADER) += slimbootloader/
 obj-$(CONFIG_APIC) += lapic.o ioapic.o
 obj-y += irq.o
 ifndef CONFIG_$(SPL_)X86_64
diff --git a/arch/x86/cpu/slimbootloader/Kconfig b/arch/x86/cpu/slimbootloader/Kconfig
new file mode 100644
index 0000000000..e7513afd5b
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/Kconfig
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+if TARGET_SLIMBOOTLOADER
+
+config SYS_SLIMBOOTLOADER
+	bool
+	default y
+	imply SYS_NS16550
+	imply AHCI_PCI
+	imply SCSI
+	imply SCSI_AHCI
+	imply MMC
+	imply MMC_PCI
+	imply MMC_SDHCI
+	imply MMC_SDHCI_SDMA
+	imply USB
+	imply USB_EHCI_HCD
+	imply USB_XHCI_HCD
+	imply USB_STORAGE
+
+endif
diff --git a/arch/x86/cpu/slimbootloader/Makefile b/arch/x86/cpu/slimbootloader/Makefile
new file mode 100644
index 0000000000..45a62d5e43
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+obj-y += car.o slimbootloader.o slimbootloader_hob.o slimbootloader_serial.o
diff --git a/arch/x86/cpu/slimbootloader/car.S b/arch/x86/cpu/slimbootloader/car.S
new file mode 100644
index 0000000000..5d71cf7034
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/car.S
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+.section .text
+
+.globl car_init
+car_init:
+	jmp	car_init_ret
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c
new file mode 100644
index 0000000000..86bae393b3
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/slimbootloader.c
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <asm/e820.h>
+#include <asm/arch/slimbootloader.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int arch_cpu_init(void)
+{
+	return x86_cpu_init_f();
+}
+
+int checkcpu(void)
+{
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	return default_print_cpuinfo();
+}
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	struct memory_map_info *data = NULL;
+	const struct efi_guid guid = LOADER_MEMORY_MAP_INFO_GUID;
+	int i = 0;
+	phys_addr_t addr_max = 0;
+	phys_addr_t addr_end = 0;
+	phys_addr_t size_max = 0;
+	phys_addr_t size_cur = 0;
+
+	data = (struct memory_map_info *)
+		get_guid_hob_data_len(gd->arch.hob_list, NULL, &guid);
+	if (!data) {
+		debug("memory map info hob not found\n");
+		return gd->ram_size;
+	}
+
+	for (i = 0; i < data->count; i++) {
+		if (data->entry[i].type == E820_RAM) {
+			size_cur = data->entry[i].size;
+			addr_end = data->entry[i].addr + size_cur;
+			if (addr_end < 1ULL << 32 && size_cur > size_max) {
+				size_max = size_cur;
+				addr_max = addr_end;
+			}
+		}
+	}
+
+	return addr_max;
+}
+
+int dram_init(void)
+{
+	struct memory_map_info *data = NULL;
+	const struct efi_guid guid = LOADER_MEMORY_MAP_INFO_GUID;
+	int i = 0;
+	phys_addr_t addr_max = 0;
+	phys_addr_t addr_end = 0;
+
+	data = (struct memory_map_info *)
+		get_guid_hob_data_len(gd->arch.hob_list, NULL, &guid);
+	if (!data) {
+		debug("memory map info hob not found\n");
+		return -1;
+	}
+
+	for (i = 0; i < data->count; i++) {
+		if (data->entry[i].type == E820_RAM) {
+			addr_end = data->entry[i].addr + data->entry[i].size;
+			if (addr_end > addr_max)
+				addr_max = addr_end;
+		}
+	}
+
+	gd->ram_size = (unsigned long)addr_max;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = 0;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
+}
+
+unsigned int install_e820_map(unsigned int max_entries,
+			      struct e820_entry *entries)
+{
+	struct memory_map_info *data = NULL;
+	const struct efi_guid guid = LOADER_MEMORY_MAP_INFO_GUID;
+	int i = 0;
+	unsigned int num_entries = 0;
+
+	data = (struct memory_map_info *)
+		get_guid_hob_data_len(gd->arch.hob_list, NULL, &guid);
+	if (!data) {
+		debug("memory map info hob not found\n");
+		return 0;
+	}
+
+	for (i = 0; i < data->count; i++) {
+		entries[num_entries].addr = data->entry[i].addr;
+		entries[num_entries].size = data->entry[i].size;
+		entries[num_entries].type = data->entry[i].type;
+		num_entries++;
+	}
+
+	return num_entries;
+}
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader_hob.c b/arch/x86/cpu/slimbootloader/slimbootloader_hob.c
new file mode 100644
index 0000000000..dd1a19757f
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/slimbootloader_hob.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <asm/fsp/fsp_types.h>
+#include <asm/fsp/fsp_hob.h>
+
+bool compare_guid(const struct efi_guid *guid1,
+		  const struct efi_guid *guid2)
+{
+	if (memcmp(guid1, guid2, sizeof(struct efi_guid)) == 0)
+		return true;
+	else
+		return false;
+}
+
+const struct hob_header *get_next_hob_from_hdr(uint type,
+					       const void *hob_list)
+{
+	const struct hob_header *hdr;
+
+	hdr = hob_list;
+
+	/* Parse the HOB list until end of list or matching type is found */
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == type)
+			return hdr;
+
+		hdr = get_next_hob(hdr);
+	}
+
+	return NULL;
+}
+
+const struct hob_header *get_next_guid_hob(const struct efi_guid *guid,
+					   const void *hob_list)
+{
+	const struct hob_header *hdr;
+	struct hob_guid *guid_hob;
+
+	hdr = hob_list;
+	while ((hdr = get_next_hob_from_hdr(HOB_TYPE_GUID_EXT, hdr)) != NULL) {
+		guid_hob = (struct hob_guid *)hdr;
+		if (compare_guid(guid, &guid_hob->name))
+			break;
+		hdr = get_next_hob(hdr);
+	}
+
+	return hdr;
+}
+
+void *get_guid_hob_data_len(const void *hob_list, u32 *len,
+			    const struct efi_guid *guid)
+{
+	const struct hob_header *guid_hob;
+
+	guid_hob = get_next_guid_hob(guid, hob_list);
+	if (!guid_hob)
+		return NULL;
+
+	if (len)
+		*len = get_guid_hob_data_size(guid_hob);
+
+	return get_guid_hob_data(guid_hob);
+}
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader_serial.c b/arch/x86/cpu/slimbootloader/slimbootloader_serial.c
new file mode 100644
index 0000000000..81bd085a35
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/slimbootloader_serial.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <serial.h>
+#include <asm/arch/slimbootloader.h>
+
+#if CONFIG_IS_ENABLED(DM_SERIAL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+int slimbootloader_serial_ofdata_to_platdata(struct udevice *dev)
+{
+	const struct efi_guid guid = LOADER_SERIAL_PORT_INFO_GUID;
+	struct serial_port_info *serial_info = NULL;
+	struct ns16550_platdata *plat = dev->platdata;
+
+	if (!gd->arch.hob_list) {
+		debug("hoblist not found\n");
+		return -1;
+	}
+
+	serial_info = (struct serial_port_info *)
+	    get_guid_hob_data_len(gd->arch.hob_list, NULL, &guid);
+
+	if (!serial_info) {
+		debug("failed to get serial port information\n");
+		return -1;
+	}
+	debug("type:%d base=0x%08x baudrate=%d stride=%d clk=%d\n",
+	      serial_info->type,
+	      serial_info->base,
+	      serial_info->baud,
+	      serial_info->stride,
+	      serial_info->clk);
+
+	plat->base = serial_info->base;
+	plat->reg_shift = (serial_info->stride >> 1);
+	plat->clock = serial_info->clk;
+
+	return 0;
+}
+
+static const struct udevice_id slimbootloader_serial_ids[] = {
+	{ .compatible = "intel,slimbootloader-uart" },
+	{}
+};
+#endif /* OF_CONTROL && !OF_PLATDATA */
+
+#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
+U_BOOT_DRIVER(serial_slimbootloader) = {
+	.name	= "serial_slimbootloader",
+	.id	= UCLASS_SERIAL,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.of_match = slimbootloader_serial_ids,
+	.ofdata_to_platdata = slimbootloader_serial_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
+#endif
+	.priv_auto_alloc_size = sizeof(struct NS16550),
+	.probe	= ns16550_serial_probe,
+	.ops	= &ns16550_serial_ops,
+};
+#endif /* SERIAL_PRESENT */
+#endif /* DM_SERIAL */
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index fa717bc096..7c382f416b 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -18,7 +18,8 @@ dtb-y += bayleybay.dtb \
 	qemu-x86_i440fx.dtb \
 	qemu-x86_q35.dtb \
 	theadorable-x86-dfi-bt700.dtb \
-	baytrail_som-db5800-som-6867.dtb
+	baytrail_som-db5800-som-6867.dtb \
+	slimbootloader.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/x86/dts/slimbootloader.dts b/arch/x86/dts/slimbootloader.dts
new file mode 100644
index 0000000000..c8eec610a8
--- /dev/null
+++ b/arch/x86/dts/slimbootloader.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
+/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
+
+/ {
+	model = "slimbootloader x86 payload";
+	compatible = "slimbootloader,x86-payload";
+
+	config {
+		silent_console = <0>;
+	};
+
+	chosen {
+		stdout-path = &serial;
+	};
+
+	serial: serial {
+		compatible = "intel,slimbootloader-uart";
+	};
+
+	pci {
+		compatible = "pci-x86";
+	};
+};
diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
new file mode 100644
index 0000000000..d9edaa5e36
--- /dev/null
+++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#ifndef __SLIMBOOTLOADER_ARCH_H__
+#define __SLIMBOOTLOADER_ARCH_H__
+
+#include <common.h>
+#include <asm/fsp/fsp_types.h>
+#include <asm/fsp/fsp_hob.h>
+
+#define LOADER_SERIAL_PORT_INFO_GUID \
+	{ \
+	0x6c6872fe, 0x56a9, 0x4403, \
+	{ 0xbb, 0x98, 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1 } \
+	}
+
+#define LOADER_MEMORY_MAP_INFO_GUID \
+	{ \
+	0xa1ff7424, 0x7a1a, 0x478e, \
+	{ 0xa9, 0xe4, 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32 } \
+	}
+
+#define LOADER_PERFORMANCE_INFO_GUID \
+	{ \
+	0x868204be, 0x23d0, 0x4ff9, \
+	{ 0xac, 0x34, 0xb9, 0x95, 0xac, 0x04, 0xb1, 0xb9 } \
+	}
+
+struct performance_info {
+	u8	rev;
+	u8	rsvd0[3];
+	u16	count;
+	u16	flags;
+	u32	frequency;
+	u64	timestamp[0];
+} __packed;
+
+struct memory_map_entry {
+	phys_addr_t	addr;
+	phys_size_t	size;
+	u8	type;
+	u8	flag;
+	u8	rsvd[6];
+} __packed;
+
+struct memory_map_info {
+	u8	rev;
+	u8	rsvd0[3];
+	u32	count;
+	struct memory_map_entry	entry[0];
+} __packed;
+
+struct serial_port_info {
+	u8	rev;
+	u8	rsvd0[3];
+	u32	type;
+	u32	base;
+	u32	baud;
+	u32	stride;
+	u32	clk;
+	u32	rsvd1;
+} __packed;
+
+bool compare_guid(const struct efi_guid *guid1,
+		  const struct efi_guid *guid2);
+
+const struct hob_header *get_next_hob_from_hdr(uint type,
+					       const void *hob_list);
+
+const struct hob_header *get_next_guid_hob(const struct efi_guid *guid,
+					   const void *hob_list);
+
+void *get_guid_hob_data_len(const void *hob_list, u32 *len,
+			    const struct efi_guid *guid);
+
+#endif
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 9398ec33b2..674efaaa01 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -83,7 +83,7 @@ struct arch_global_data {
 	const struct pch_gpio_map *gpio_map;	/* board GPIO map */
 	struct memory_info meminfo;	/* Memory information */
 	struct pei_memory_info pei_meminfo;	/* PEI memory information */
-#ifdef CONFIG_HAVE_FSP
+#if defined(CONFIG_HAVE_FSP) || defined(CONFIG_SYS_SLIMBOOTLOADER)
 	void *hob_list;			/* FSP HOB list */
 #endif
 	struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 90dce22b25..258c0bbc2c 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -17,7 +17,7 @@
 int main(void)
 {
 	DEFINE(GD_BIST, offsetof(gd_t, arch.bist));
-#ifdef CONFIG_HAVE_FSP
+#if defined(CONFIG_HAVE_FSP) || defined(CONFIG_SYS_SLIMBOOTLOADER)
 	DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list));
 #endif
 	DEFINE(GD_TABLE, offsetof(gd_t, arch.table));
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index ac85278cdf..2c6e6a4252 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -21,7 +21,7 @@ int init_cache_f_r(void)
 #if (CONFIG_IS_ENABLED(X86_32BIT_INIT) || \
      (!defined(CONFIG_SPL_BUILD) && \
       !CONFIG_IS_ENABLED(CONFIG_X86_RUN_64BIT))) && \
-    !defined(CONFIG_HAVE_FSP)
+    !defined(CONFIG_HAVE_FSP) && !defined(CONFIG_SYS_SLIMBOOTLOADER)
 	int ret;
 
 	ret = mtrr_commit(false);
diff --git a/board/slimbootloader/Kconfig b/board/slimbootloader/Kconfig
new file mode 100644
index 0000000000..4822c451e6
--- /dev/null
+++ b/board/slimbootloader/Kconfig
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+if VENDOR_SLIMBOOTLOADER
+
+choice
+	prompt "Select a board"
+	optional
+
+config TARGET_SLIMBOOTLOADER
+	bool "slimbootloader"
+	help
+	  This target is used for running U-Boot on top of
+	  Slim Bootloader as a payload.
+
+endchoice
+
+source "board/slimbootloader/slimbootloader/Kconfig"
+
+endif
diff --git a/board/slimbootloader/slimbootloader/Kconfig b/board/slimbootloader/slimbootloader/Kconfig
new file mode 100644
index 0000000000..7262f2bf1b
--- /dev/null
+++ b/board/slimbootloader/slimbootloader/Kconfig
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+if TARGET_SLIMBOOTLOADER
+
+config SYS_BOARD
+	default "slimbootloader"
+
+config SYS_VENDOR
+	default "slimbootloader"
+
+config SYS_SOC
+	default "slimbootloader"
+
+config SYS_TEXT_BASE
+	default 0x00100000
+
+comment "slimbootloader-specific options"
+
+config SYS_CONFIG_NAME
+	string "Board configuration file"
+	default "slimbootloader"
+	help
+	  This option selects the board configuration file in include/configs/
+	  directory to be used to build U-Boot for Slim Bootloader.
+
+config DEFAULT_DEVICE_TREE
+	string "Board Device Tree Source (dts) file"
+	default "slimbootloader"
+	help
+	  This option selects the board Device Tree Source (dts) file in
+	  arch/x86/dts/ directory to be used to build U-Boot for Slim Bootloader.
+
+config SYS_CAR_ADDR
+	hex "Board specific Cache-As-RAM (CAR) address"
+	default 0x00000000
+	help
+	  This option specifies the board specific Cache-As-RAM (CAR) address.
+	  But, CAR is not required for Slim Bootloader environment since it
+	  has already initialized memory and launched u-boot as a payload.
+
+config SYS_CAR_SIZE
+	hex "Board specific Cache-As-RAM (CAR) size"
+	default 0x0000
+	help
+	  This option specifies the board specific Cache-As-RAM (CAR) size.
+	  But, CAR is not required for Slim Bootloader environment since it
+	  has already initialized memory and launched u-boot as a payload.
+
+endif
diff --git a/board/slimbootloader/slimbootloader/Makefile b/board/slimbootloader/slimbootloader/Makefile
new file mode 100644
index 0000000000..f591943a78
--- /dev/null
+++ b/board/slimbootloader/slimbootloader/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Intel Corporation <www.intel.com>
+
+obj-y	+= slimbootloader_start.o slimbootloader.o
diff --git a/board/slimbootloader/slimbootloader/slimbootloader.c b/board/slimbootloader/slimbootloader/slimbootloader.c
new file mode 100644
index 0000000000..653e6ec077
--- /dev/null
+++ b/board/slimbootloader/slimbootloader/slimbootloader.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <asm/io.h>
+#include <asm/arch/slimbootloader.h>
+#include <relocate.h>
+#include <dm.h>
+#include <ns16550.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void board_early_init_tsc(void)
+{
+	struct performance_info *data = NULL;
+	const struct efi_guid guid = LOADER_PERFORMANCE_INFO_GUID;
+
+	gd->arch.tsc_base = rdtsc();
+	debug("tsc_base=0x%llx\n", gd->arch.tsc_base);
+
+	data = (struct performance_info *)
+		get_guid_hob_data_len(gd->arch.hob_list, NULL, &guid);
+
+	if (!data) {
+		debug("performance info hob not found\n");
+		return;
+	}
+	gd->arch.clock_rate = data->frequency * 1000;
+	debug("freq=0x%lx\n", gd->arch.clock_rate);
+}
+
+int board_early_init_f(void)
+{
+	return 0;
+}
+
+int arch_early_init_r(void)
+{
+	return 0;
+}
+
+int board_early_init_r(void)
+{
+	pci_init();
+	return 0;
+}
+
+int slimbootloader_main(void)
+{
+	debug("%s\n", __func__);
+	debug("hoblist=0x%p\n", gd->arch.hob_list);
+	board_early_init_tsc();
+	board_init_f(0);
+	board_init_f_r_trampoline(gd->start_addr_sp);
+
+	return 0;
+}
diff --git a/board/slimbootloader/slimbootloader/slimbootloader_start.S b/board/slimbootloader/slimbootloader/slimbootloader_start.S
new file mode 100644
index 0000000000..d884708b69
--- /dev/null
+++ b/board/slimbootloader/slimbootloader/slimbootloader_start.S
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <generated/asm-offsets.h>
+
+.globl slimbootloader_start
+slimbootloader_start:
+	mov	0x4(%esp), %esi
+
+	/* Set up global data */
+	mov	%esp, %eax
+	call	board_init_f_alloc_reserve
+	mov	%eax, %esp
+	call	board_init_f_init_reserve
+
+#ifdef CONFIG_DEBUG_UART
+	call	debug_uart_init
+#endif
+
+	/* Get address of global_data */
+	mov	%fs:0, %edx
+
+	movl	%esi, GD_HOB_LIST(%edx)
+	call	slimbootloader_main
+
+/* board early initialization */
+.globl early_board_init
+early_board_init:
+	jmp	slimbootloader_start
diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig
new file mode 100644
index 0000000000..77ff3257b6
--- /dev/null
+++ b/configs/slimbootloader_defconfig
@@ -0,0 +1,64 @@
+CONFIG_X86=y
+CONFIG_VENDOR_SLIMBOOTLOADER=y
+CONFIG_TARGET_SLIMBOOTLOADER=y
+CONFIG_X86_LOAD_FROM_32_BIT=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_USB=y
+CONFIG_DOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTDELAY=10
+CONFIG_CONSOLE_SCROLL_LINES=5
+# CONFIG_PCI_PNP is not set
+# CONFIG_I8259_PIC is not set
+# CONFIG_APIC is not set
+# CONFIG_CMD_EXT4_WRITE is not set
+# CONFIG_CMD_FS_GENERIC is not set
+# CONFIG_CMD_PART is not set
+# CONFIG_CMD_TIME is not set
+# CONFIG_CMD_BOOTSTAGE is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_SF_TEST is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_BOOTP is not set
+# CONFIG_CMD_BLOCK_CACHE is not set
+# CONFIG_CMD_DATE is not set
+# CONFIG_CMD_GETTIME is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_CMD_IRQ is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_DM_KEYBOARD is not set
+# CONFIG_DM_VIDEO is not set
+# CONFIG_DM_GPIO is not set
+# CONFIG_MMC_VERBOSE is not set
+# CONFIG_GZIP is not set
+# CONFIG_HEXDUMP is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_GENERATE_SMBIOS_TABLE is not set
+# CONFIG_IMAGE_FORMAT_LEGACY is not set
+# CONFIG_FIT is not set
diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h
new file mode 100644
index 0000000000..bfd188de2c
--- /dev/null
+++ b/include/configs/slimbootloader.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#ifndef __SLIMBOOTLOADER_CONFIG_H__
+#define __SLIMBOOTLOADER_CONFIG_H__
+
+#include <configs/x86-common.h>
+
+#undef CONFIG_NFSBOOTCOMMAND
+#undef CONFIG_RAMBOOTCOMMAND
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#undef CONFIG_BOOTCOMMAND
+
+/*-----------------------------------------------------------------------
+ * For MEM32 uart
+ */
+/*#define CONFIG_SYS_NS16550_MEM32*/
+#ifdef CONFIG_SYS_NS16550_MEM32
+#undef CONFIG_SYS_NS16550_PORT_MAPPED
+#endif
+
+#define CONFIG_STD_DEVICES_SETTINGS		\
+	"stdin=serial,i8042-kbd,usbkbd\0"	\
+	"stdout=serial\0"			\
+	"stderr=serial\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	CONFIG_STD_DEVICES_SETTINGS		\
+	"netdev=eth0\0"				\
+	"consoledev=ttyS0\0"			\
+	"ramdiskaddr=0x4000000\0"		\
+	"ramdiskfile=initrd\0"			\
+	"bootdev=usb\0"				\
+	"bootdevnum=0\0"			\
+	"bootdevpart=0\0"			\
+	"bootfsload=fatload\0"			\
+	"bootusb=setenv bootdev usb; boot\0"	\
+	"bootscsi=setenv bootdev scsi; boot\0"	\
+	"bootmmc=setenv bootdev mmc; boot\0"	\
+	"bootargs=console=ttyS0,115200 console=tty0\0"
+
+#define CONFIG_BOOTCOMMAND						\
+	"if test ${bootdev} = \"usb\"; then ${bootdev} start; fi; "	\
+	"if test ${bootdev} = \"scsi\"; then ${bootdev} scan; fi; "	\
+	"${bootdev} info; "						\
+	"${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} "	\
+	"${loadaddr} ${bootfile}; "					\
+	"${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} "	\
+	"${ramdiskaddr} ${ramdiskfile}; "				\
+	"zboot ${loadaddr} 0 ${ramdiskaddr} ${filesize}"
+
+#endif /* __SLIMBOOTLOADER_CONFIG_H__ */
