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[3/9] spi: zynqmp_gqspi: Add support for Versal NET

Message ID 9b7610819b6c52e799b58e4af005525f7ab51727.1663318393.git.michal.simek@amd.com
State Superseded
Delegated to: Michal Simek
Headers show
Series xilinx: versal-net: Add support for new Versal NET SoC | expand

Commit Message

Michal Simek Sept. 16, 2022, 8:53 a.m. UTC 
Add support for Versal NET platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 drivers/spi/zynqmp_gqspi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
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Patch

diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 4e718c545c64..d3cc8554b8fb 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -308,7 +308,8 @@  void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval)
 	debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n",
 	      __func__, reqhz, clk_rate, baudrateval);
 
-	if (!IS_ENABLED(CONFIG_ARCH_VERSAL)) {
+	if (!(IS_ENABLED(CONFIG_ARCH_VERSAL) ||
+	      IS_ENABLED(CONFIG_ARCH_VERSAL_NET))) {
 		if (reqhz <= GQSPI_FREQ_40MHZ) {
 			tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE <<
 					TAP_DLY_BYPASS_LQSPI_RX_SHIFT;