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[U-Boot] p4080ds starts OS with MSR[EE]=1 and DEC armed?

Message ID 977C59AE-9AB2-4B92-B508-C057CB172F0C@kernel.crashing.org
State Not Applicable
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Commit Message

Kumar Gala March 15, 2011, 5:39 a.m. UTC
On Mar 14, 2011, at 4:37 PM, Scott Wood wrote:

> On Mon, 14 Mar 2011 16:25:54 -0500
> Kumar Gala <galak@kernel.crashing.org> wrote:
> 
>> 
>> On Mar 14, 2011, at 1:09 PM, Scott Wood wrote:
>> 
>>> On Sat, 12 Mar 2011 16:56:09 -0600
>>> Kumar Gala <galak@kernel.crashing.org> wrote:
>>> 
>>>> 
>>>> On Mar 3, 2011, at 8:59 AM, Jimi Xenidis wrote:
>>>> 
>>>>> I was surprised to find myself at the decrement interrupt when running my new stuff.
>>>>> That is against ePAPR, right?
>>>>> Does u-boot at least make sure that the DEC is set to some large value before it leaps at me?
>>>>> I don't mind forcing EE=0 but I'd like to make sure I make it that far into the code :)
>>>>> -JX
>>>> 
>>>> Jimi,
>>>> 
>>>> Not sure how or why you are seeing this, but u-boot should disable interrupts in common/cmd_bootm.c
>>>> 
>>>> Look for disable_interrupts() -> this should set MSR[EE] = 0.
>>> 
>>> What about the rest of MSR -- ME/CE/DE?
>> 
>> I dont think we ever turn on CE in u-boot, DE would only get set in some weird external debugger build.
> 
> From arch/powerpc/cpu/mpc85xx/start.S:
> 
>        /* switch back to AS = 0 */
>        lis     r3,(MSR_CE|MSR_ME|MSR_DE)@h
>        ori     r3,r3,(MSR_CE|MSR_ME|MSR_DE)@l
>        mtmsr   r3
>        isync
> 
>        bl      cpu_init_f
>        bl      board_init_f
>        isync
> 
> -Scott

commit 15fba3279b56333bdb65ead366f82c945ed320d1
Author: Kumar Gala <galak@kernel.crashing.org>
Date:   Fri Sep 11 15:28:41 2009 -0500

    ppc/85xx: Disable all async interrupt sources when we boot
    
    We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
    since we have changed the exception vectors and the OSes vectors might
    not be setup we should avoid async interrupts at all costs.
    
    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>


-----

:)

- k

Comments

Scott Wood March 15, 2011, 4:11 p.m. UTC | #1
On Tue, 15 Mar 2011 00:39:17 -0500
Kumar Gala <galak@kernel.crashing.org> wrote:

> diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
> index 48a82ed..a6d1e99 100644
> --- a/cpu/mpc85xx/cpu_init.c
> +++ b/cpu/mpc85xx/cpu_init.c
> @@ -364,5 +364,16 @@ extern void setup_ivors(void);
>  
>  void arch_preboot_os(void)
>  {
> +       u32 msr;
> +
> +       /*
> +        * We are changing interrupt offsets and are about to boot the OS so
> +        * we need to make sure we disable all async interrupts. EE is already
> +        * disabled by the time we get called.
> +        */
> +       msr = mfmsr();
> +       msr &= ~(MSR_ME|MSR_CE|MSR_DE);
> +       mtmsr(msr);
> +
>         setup_ivors();
>  }
> 
> -----
> 
> :)

Ah, thanks.  Not sure why my previous grep found the other one but not
this. :-)

-Scott
diff mbox

Patch

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 48a82ed..a6d1e99 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -364,5 +364,16 @@  extern void setup_ivors(void);
 
 void arch_preboot_os(void)
 {
+       u32 msr;
+
+       /*
+        * We are changing interrupt offsets and are about to boot the OS so
+        * we need to make sure we disable all async interrupts. EE is already
+        * disabled by the time we get called.
+        */
+       msr = mfmsr();
+       msr &= ~(MSR_ME|MSR_CE|MSR_DE);
+       mtmsr(msr);
+
        setup_ivors();
 }