diff mbox

[U-Boot] mx51evk: Provide a proper reset for the Ethernet PHY

Message ID 97111.4004.qm@web51008.mail.re2.yahoo.com
State Rejected
Delegated to: Stefano Babic
Headers show

Commit Message

Fabio Estevam Aug. 19, 2010, 5:28 p.m. UTC
Provide a proper reset for the Ethernet PHY (LAN8700) on the MX51EVK.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
 board/freescale/mx51evk/mx51evk.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

Comments

Stefano Babic Aug. 20, 2010, 8:31 a.m. UTC | #1
Fabio Estevam wrote:
> Provide a proper reset for the Ethernet PHY (LAN8700) on the MX51EVK.
> 

Hi Fabio,

> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
>  board/freescale/mx51evk/mx51evk.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
> index 75d642b..70cce55 100644
> --- a/board/freescale/mx51evk/mx51evk.c
> +++ b/board/freescale/mx51evk/mx51evk.c
> @@ -261,6 +261,10 @@ static void power_init(void)
>  
>  	/* Reset the ethernet controller over GPIO */
>  	writel(0x1, IOMUXC_BASE_ADDR + 0x0AC);
> +	udelay(200);
> +	reg = readl(GPIO2_BASE_ADDR + 0x0);
> +	reg |= 0x4000;  /* Set reset line to high*/
> +	writel(reg, GPIO2_BASE_ADDR + 0x0);

I know I am responsible for this usage, because I forget to add some
accessors for the gpio pins - as I see your patch, I have sent a patch
to support it. However, a direct access to registers using offsets is
not allowed in u-boot. If we use some kind of accessors, your code will
be easier to read it. Everything could be changed as (0X4000 --> gpio
46, if I am not wrong):

	udelay(200);
	mxc_gpio_set(46);

What do you think ?

Best regards,
Stefano
diff mbox

Patch

diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 75d642b..70cce55 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -261,6 +261,10 @@  static void power_init(void)
 
 	/* Reset the ethernet controller over GPIO */
 	writel(0x1, IOMUXC_BASE_ADDR + 0x0AC);
+	udelay(200);
+	reg = readl(GPIO2_BASE_ADDR + 0x0);
+	reg |= 0x4000;  /* Set reset line to high*/
+	writel(reg, GPIO2_BASE_ADDR + 0x0);
 
 	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
 	val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |