| Message ID | 8dc6332c-5b99-4b9c-a1c1-48068b71e474@ATCPCS12.andestech.com |
|---|---|
| State | Rejected |
| Delegated to: | Andes |
| Headers | show |
| Series | [U-Boot] Pull request: u-boot-riscv/master | expand |
Hi Rick, On Wed, Jun 24, 2020 at 10:41 AM <uboot@andestech.com> wrote: > > Hi Tom, > > Please pull some riscv updates: > > - fu540: dts: Correct reg size of otp and dmc nodes > - sbi: Add newline to error message > - sifive/fu540: Enable SPI-NOR support > > Thanks > Rick > > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/701223929 > > > The following changes since commit 4ff63383e3497389e66cf70943a83bdb1810462a: > > Merge tag 'u-boot-imx-20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2020-06-23 08:20:55 -0400) > > are available in the Git repository at: > > git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to 2148d9c76ef5efbf5b98ca3d3fcbaad465115e70: > > riscv: fu540: dts: Correct reg size of otp and dmc nodes (2020-06-24 09:59:30 +0800) > > ---------------------------------------------------------------- > Bin Meng (2): > riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node > riscv: fu540: dts: Correct reg size of otp and dmc nodes > > Jagan Teki (6): > sifive: fu540: Add runtime boot mode detection > sifive: fu540: Add Booting from SPI > env: Enable SPI flash env for SiFive FU540 > sifive: fu540: Mark the default env as SPI flash > sifive: fu540: Add boot flash script offset, size > sifive: fu540: Enable SF distro bootcmd You missed my review comments for Jagan's series. https://lists.denx.de/pipermail/u-boot/2020-June/417066.html Please hold on. > > Sean Anderson (1): > riscv: sbi: Add newline to error message > Regards, Bin
Hi Tom > From: Bin Meng [mailto:bmeng.cn@gmail.com] > Sent: Wednesday, June 24, 2020 10:58 AM > To: Open Source Project uboot > Cc: Tom Rini; U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志) > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master > > Hi Rick, > > On Wed, Jun 24, 2020 at 10:41 AM <uboot@andestech.com> wrote: > > > > Hi Tom, > > > > Please pull some riscv updates: > > > > - fu540: dts: Correct reg size of otp and dmc nodes > > - sbi: Add newline to error message > > - sifive/fu540: Enable SPI-NOR support > > > > Thanks > > Rick > > > > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/701223929 > > > > > > The following changes since commit 4ff63383e3497389e66cf70943a83bdb1810462a: > > > > Merge tag 'u-boot-imx-20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2020-06-23 08:20:55 -0400) > > > > are available in the Git repository at: > > > > git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git > > > > for you to fetch changes up to 2148d9c76ef5efbf5b98ca3d3fcbaad465115e70: > > > > riscv: fu540: dts: Correct reg size of otp and dmc nodes (2020-06-24 09:59:30 +0800) > > > > ---------------------------------------------------------------- > > Bin Meng (2): > > riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node > > riscv: fu540: dts: Correct reg size of otp and dmc nodes > > > > Jagan Teki (6): > > sifive: fu540: Add runtime boot mode detection > > sifive: fu540: Add Booting from SPI > > env: Enable SPI flash env for SiFive FU540 > > sifive: fu540: Mark the default env as SPI flash > > sifive: fu540: Add boot flash script offset, size > > sifive: fu540: Enable SF distro bootcmd > > You missed my review comments for Jagan's series. > https://lists.denx.de/pipermail/u-boot/2020-June/417066.html > > Please hold on. Please drop this PR. Thanks, Rick > > > > > Sean Anderson (1): > > riscv: sbi: Add newline to error message > > > > Regards, > Bin > CONFIDENTIALITY NOTICE: > > This e-mail (and its attachments) may contain confidential and legally privileged information or information protected from disclosure. If you are not the intended recipient, you are hereby notified that any disclosure, copying, distribution, or use of the information contained herein is strictly prohibited. In this case, please immediately notify the sender by return e-mail, delete the message (and any accompanying documents) and destroy all printed hard copies. Thank you for your cooperation. > > Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.
Hi Tom, Please pull some riscv updates: - fu540: dts: Correct reg size of otp and dmc nodes - sbi: Add newline to error message - sifive/fu540: Enable SPI-NOR support Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/701223929 The following changes since commit 4ff63383e3497389e66cf70943a83bdb1810462a: Merge tag 'u-boot-imx-20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2020-06-23 08:20:55 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 2148d9c76ef5efbf5b98ca3d3fcbaad465115e70: riscv: fu540: dts: Correct reg size of otp and dmc nodes (2020-06-24 09:59:30 +0800) ---------------------------------------------------------------- Bin Meng (2): riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node riscv: fu540: dts: Correct reg size of otp and dmc nodes Jagan Teki (6): sifive: fu540: Add runtime boot mode detection sifive: fu540: Add Booting from SPI env: Enable SPI flash env for SiFive FU540 sifive: fu540: Mark the default env as SPI flash sifive: fu540: Add boot flash script offset, size sifive: fu540: Enable SF distro bootcmd Sean Anderson (1): riscv: sbi: Add newline to error message arch/riscv/cpu/fu540/Kconfig | 15 +++++++++++++++ arch/riscv/dts/fu540-c000-u-boot.dtsi | 6 +++--- arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 12 ++++++++++++ board/sifive/fu540/Kconfig | 1 + board/sifive/fu540/fu540.c | 25 +++++++++++++++++++------ common/spl/spl_opensbi.c | 2 +- configs/sifive_fu540_defconfig | 4 ++++ doc/board/sifive/fu540.rst | 41 +++++++++++++++++++++++++++++++++++++++++ include/configs/sifive-fu540.h | 7 ++++++- 9 files changed, 102 insertions(+), 11 deletions(-)