| Message ID | 87153c59cc526f5955b3bff3db11027b5848c042.1634302099.git.michal.simek@xilinx.com |
|---|---|
| State | Accepted |
| Commit | 599becb0ae6a8a52db74c2922f0c8ea601d7b003 |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | arm64: zynqmp: Fix sgmii clock input freq for p-a2197 | expand |
On 10/15/21 14:48, Michal Simek wrote: > Input frequency for sgmii is 125MHz on all Xilinx designs. > > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts > index c893aaaafd8f..5d21795de9d0 100644 > --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts > +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts > @@ -46,7 +46,7 @@ > si5332_1: si5332_1 { /* clk0_sgmii - u142 */ > compatible = "fixed-clock"; > #clock-cells = <0>; > - clock-frequency = <33333333>; /* FIXME */ > + clock-frequency = <125000000>; > }; > > si5332_2: si5332_2 { /* clk1_usb - u142 */ > Applied. M
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index c893aaaafd8f..5d21795de9d0 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -46,7 +46,7 @@ si5332_1: si5332_1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <33333333>; /* FIXME */ + clock-frequency = <125000000>; }; si5332_2: si5332_2 { /* clk1_usb - u142 */
Input frequency for sgmii is 125MHz on all Xilinx designs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)