From patchwork Tue Nov 27 13:30:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau?= X-Patchwork-Id: 202217 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A498F2C008E for ; Wed, 28 Nov 2012 00:27:39 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1E6904A095; Tue, 27 Nov 2012 14:27:36 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id k5NuUTuSbcDL; Tue, 27 Nov 2012 14:27:35 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5D0FC4A088; Tue, 27 Nov 2012 14:27:25 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 243CE4A088 for ; Tue, 27 Nov 2012 14:27:18 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JykZ5G03FOe6 for ; Tue, 27 Nov 2012 14:27:04 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 IN_IX_MANITU=4.35 (only DNSBL check requested) Received: from zose-mta13.web4all.fr (zose-mta13.web4all.fr [178.33.204.91]) by theia.denx.de (Postfix) with ESMTP id 4A0EA4A087 for ; Tue, 27 Nov 2012 14:27:01 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zose-mta13.web4all.fr (Postfix) with ESMTP id 13A4A5806C; Tue, 27 Nov 2012 14:33:54 +0100 (CET) X-Virus-Scanned: amavisd-new at zose1.web4all.fr Received: from zose-mta13.web4all.fr ([127.0.0.1]) by localhost (zose-mta13.web4all.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0C2BUVp2RW7O; Tue, 27 Nov 2012 14:33:52 +0100 (CET) Received: from zose-store12.web4all.fr (zose-store12.web4all.fr [178.33.204.49]) by zose-mta13.web4all.fr (Postfix) with ESMTP id 52F7C5806A; Tue, 27 Nov 2012 14:33:52 +0100 (CET) Date: Tue, 27 Nov 2012 14:30:15 +0100 (CET) From: =?utf-8?Q?Beno=C3=AEt_Th=C3=A9baudeau?= To: U-Boot-Users ML Message-ID: <867526288.2224095.1354023015881.JavaMail.root@advansee.com> In-Reply-To: <803337004.2398344.1344948724367.JavaMail.root@advansee.com> MIME-Version: 1.0 X-Originating-IP: [88.188.188.98] X-Mailer: Zimbra 7.2.0_GA_2669 (ZimbraWebClient - FF3.0 (Win)/7.2.0_GA_2669) Cc: Dirk Behme , Tom Rini Subject: [U-Boot] [PATCH v2 1/5] imx iim: Homogenize and fix register definitions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Homogenize prg_p naming (the reference manuals are not always self-consistent for that). Add missing registers. Fix some registers. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic Cc: Wolfgang Denk --- This patch supersedes http://patchwork.ozlabs.org/patch/177242/ . Changes for v2: - Rebase against latest master. .../arch/arm/include/asm/arch-mx25/imx-regs.h | 8 ++++++-- .../arch/arm/include/asm/arch-mx27/imx-regs.h | 2 +- .../arch/arm/include/asm/arch-mx31/imx-regs.h | 9 +++++++-- .../arch/arm/include/asm/arch-mx35/imx-regs.h | 7 ++++++- .../arch/arm/include/asm/arch-mx5/imx-regs.h | 6 +++++- 5 files changed, 25 insertions(+), 7 deletions(-) diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx25/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx25/imx-regs.h index 53aafe3..1b71168 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx25/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -117,8 +117,12 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; - u32 res1[0x1f5]; + u32 iim_prg_p; + u32 iim_scs0; + u32 iim_scs1; + u32 iim_scs2; + u32 iim_scs3; + u32 res1[0x1f1]; struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx27/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx27/imx-regs.h index 2f6c823..aee058f 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx27/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -176,7 +176,7 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx31/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx31/imx-regs.h index 8fd3d08..e799f37 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx31/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -79,7 +79,7 @@ struct wdog_regs { u16 wrsr; /* Reset Status */ }; -/* IIM Control Registers */ +/* IIM control registers */ struct iim_regs { u32 iim_stat; u32 iim_statm; @@ -91,11 +91,16 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; + u32 res[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; }; struct iomuxc_regs { diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx35/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx35/imx-regs.h index 7b09809..6161784 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx35/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -258,11 +258,16 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; + u32 res1[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; }; /* General Purpose Timer (GPT) registers */ diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx5/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx5/imx-regs.h index 1d060fd..8f0a7ec 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx5/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -508,7 +508,7 @@ struct iim_regs { u32 sdat; u32 prev; u32 srev; - u32 preg_p; + u32 prg_p; u32 scs0; u32 scs1; u32 scs2; @@ -517,7 +517,11 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; +#if defined(CONFIG_MX51) } bank[4]; +#elif defined(CONFIG_MX53) + } bank[5]; +#endif }; struct fuse_bank0_regs {