From patchwork Tue May 17 19:35:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timothy Pearson X-Patchwork-Id: 623251 X-Patchwork-Delegate: hdegoede@redhat.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3r8SHT2fBLz9t87 for ; Wed, 18 May 2016 05:36:05 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=raptorengineering.com header.i=@raptorengineering.com header.b=URZoiyW3; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 06028A7603; Tue, 17 May 2016 21:36:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qisfUnf6D2Pr; Tue, 17 May 2016 21:36:03 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 87E36A75CE; Tue, 17 May 2016 21:36:03 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9C9F3A75CE for ; Tue, 17 May 2016 21:36:01 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oW3khiZv4eS5 for ; Tue, 17 May 2016 21:36:01 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.pearsoncomputing.net (pearsoncomputing.net [192.119.205.242]) by theia.denx.de (Postfix) with ESMTPS id 18E3EA75BC for ; Tue, 17 May 2016 21:36:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mail.pearsoncomputing.net (Postfix) with ESMTP id 7BA63640CB7 for ; Tue, 17 May 2016 14:35:59 -0500 (CDT) Received: from mail.pearsoncomputing.net ([127.0.0.1]) by localhost (vali.starlink.edu [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id EdbLq8_7A-Gp for ; Tue, 17 May 2016 14:35:59 -0500 (CDT) Received: from localhost (localhost [127.0.0.1]) by mail.pearsoncomputing.net (Postfix) with ESMTP id EABAA641013 for ; Tue, 17 May 2016 14:35:58 -0500 (CDT) DKIM-Filter: OpenDKIM Filter v2.9.2 mail.pearsoncomputing.net EABAA641013 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raptorengineering.com; s=B8E824E6-0BE2-11E6-931D-288C65937AAD; t=1463513759; bh=s5XD/ae8JOuikxtX+7F3wLz9SaYtlPlvnWq3e584Ji0=; h=Message-ID:Date:Subject:From:To:MIME-Version:Content-Type: Content-Transfer-Encoding; b=URZoiyW3qeCtDNmIRbOfT01zH1ewI4p6g3883vjQAazrXtbQcIHdPa7CBdFta/Rhc SLCBdllm6uuPx38wFslX0280ADOdDNWLVYwF3009N9ifxBqmTCOaSjFxEi750BEyIs G3R5YFDYNbtBe+UtqE87rIfmJ+kapmefKbIKautM= X-Virus-Scanned: amavisd-new at pearsoncomputing.net Received: from mail.pearsoncomputing.net ([127.0.0.1]) by localhost (vali.starlink.edu [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id qlDrHmCfT54d for ; Tue, 17 May 2016 14:35:58 -0500 (CDT) Received: from vali.starlink.edu (localhost [127.0.0.1]) by mail.pearsoncomputing.net (Postfix) with ESMTP id B9671640CB7 for ; Tue, 17 May 2016 14:35:58 -0500 (CDT) Received: from 192.168.3.91 (proxying for 192.168.3.1) (SquirrelMail authenticated user tpearson@raptorengineeringinc.com) by vali.starlink.edu with HTTP; Tue, 17 May 2016 14:35:58 -0500 Message-ID: <6f0e7691372f17cb24fbcc6943d8249d.squirrel@vali.starlink.edu> Date: Tue, 17 May 2016 14:35:58 -0500 From: tpearson@raptorengineering.com To: u-boot@lists.denx.de User-Agent: SquirrelMail/1.4.22 MIME-Version: 1.0 X-Priority: 3 (Normal) Importance: Normal Subject: [U-Boot] [V2] [PATCH 4/8] sun8i: Add TZPC setup for A83t X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch enables non-secure access to all system peripherals controlled by the STMA, and additionally sets the secure RAM range to 64k in line with other sunxi devices. Signed-off-by: Timothy Pearson --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/tzpc.c | 10 ++++++++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 10 ++++++++++ arch/arm/mach-sunxi/board.c | 2 +- 4 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 4d2274a..4dd449b 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o obj-$(CONFIG_MACH_SUN6I) += tzpc.o obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o +obj-$(CONFIG_MACH_SUN8I_A83T) += tzpc.o ifndef CONFIG_SPL_BUILD ifdef CONFIG_ARMV7_PSCI diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c index 6c8a0fd..3b94e0d 100644 --- a/arch/arm/cpu/armv7/sunxi/tzpc.c +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c @@ -18,6 +18,16 @@ void tzpc_init(void) writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set); #endif +#ifdef SUN8I_A83T_TZPC_DECPORT0_ALL + /* Set secure RAM size to defined value */ + writel(R0SIZE, &tzpc->r0size); + + /* Enable non-secure access to all peripherals */ + writel(SUN8I_A83T_TZPC_DECPORT0_ALL, &tzpc->decport0_set); + writel(SUN8I_A83T_TZPC_DECPORT1_ALL, &tzpc->decport1_set); + writel(SUN8I_A83T_TZPC_DECPORT2_ALL, &tzpc->decport2_set); +#endif + #ifdef CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to all peripherals */ writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set); diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h index 95c55cd..66e6abb 100644 --- a/arch/arm/include/asm/arch-sunxi/tzpc.h +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -25,6 +25,16 @@ struct sunxi_tzpc { #define SUN6I_TZPC_DECPORT0_RTC (1 << 1) +#define SUN8I_A83T_TZPC_DECPORT0_ALL 0xbe +#define SUN8I_A83T_TZPC_DECPORT1_ALL 0x7f +#define SUN8I_A83T_TZPC_DECPORT2_ALL 0x10 + +/* + * TZPC Register Value : + * R0SIZE: 0x10 : Size of secured ram (64Kib) + */ +#define R0SIZE 0x10 + #define SUN8I_H3_TZPC_DECPORT0_ALL 0xbe #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 20149da..1ded4d6 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -183,7 +183,7 @@ void s_init(void) "orr r0, r0, #1 << 6\n" "mcr p15, 0, r0, c1, c0, 1\n"); #endif -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 +#if defined CONFIG_MACH_SUN6I || || defined CONFIG_MACH_SUN8I_A83T defined CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to some peripherals */ tzpc_init(); #endif