From patchwork Wed Jul 13 06:20:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 647742 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3rq7xh72lQz9srY for ; Wed, 13 Jul 2016 16:20:56 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 31245A7506; Wed, 13 Jul 2016 08:20:54 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I-cYVRiBvR9G; Wed, 13 Jul 2016 08:20:53 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2D25CA74F1; Wed, 13 Jul 2016 08:20:53 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6ECBEA74E3 for ; Wed, 13 Jul 2016 08:20:50 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KKTncUqEOzQM for ; Wed, 13 Jul 2016 08:20:50 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mx1.mailbox.org (mx1.mailbox.org [80.241.60.212]) by theia.denx.de (Postfix) with ESMTPS id 20709A74D2 for ; Wed, 13 Jul 2016 08:20:47 +0200 (CEST) Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.mailbox.org (Postfix) with ESMTPS id BA25D421B2; Wed, 13 Jul 2016 08:20:38 +0200 (CEST) X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by gerste.heinlein-support.de (gerste.heinlein-support.de [91.198.250.173]) (amavisd-new, port 10030) with ESMTP id YfggIRbPhutD; Wed, 13 Jul 2016 08:20:37 +0200 (CEST) To: U-Boot list From: Stefan Roese Message-ID: <5785DDB4.80102@denx.de> Date: Wed, 13 Jul 2016 08:20:36 +0200 MIME-Version: 1.0 Subject: [U-Boot] xHCI on x86 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Hi! I'm currently trying to get xHCI working on some BayTrail based x86 boards. For this I've added DM support to xhci-pci and made a small change to cache.h to enable compilation of the xhci driver on x86 (please find those 2 patches attached - I'll send then to the list once this is resolved). But I noticed that the xhci driver hangs in xhci_queue_command() in this line: xhci_writel(&ctrl->dba->doorbell[0], DB_VALUE_HOST); when first writing to the doorbell register. Reading from this doorbell register still works just fine. IIRC, Simon has mentioned that xHCI still has some "issues" on x86. Simon, is this what you have seen as well? Does anyone have some ideas how to solve this? Thanks, Stefan From 73e74da69cc2606eb2815bd97f8c2dff3c17c6a7 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 6 Jul 2016 08:27:19 +0200 Subject: [PATCH] WIP: usb: xhci-pci: Add DM support This patch adds DM support to the xHCI PCI driver. Enabling its use e.g. in x86 platforms. Signed-off-by: Stefan Roese --- drivers/usb/host/xhci-pci.c | 76 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index 361fcce..cf22047 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -7,12 +7,15 @@ */ #include +#include #include #include #include #include "xhci.h" +#ifndef CONFIG_DM_USB + /* * Create the appropriate control structures to manage a new XHCI host * controller. @@ -58,3 +61,76 @@ int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, void xhci_hcd_stop(int index) { } + +#else + +static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr, + struct xhci_hcor **ret_hcor) +{ + struct xhci_hccr *hccr; + struct xhci_hcor *hcor; + u32 cmd; + + hccr = (struct xhci_hccr *)dm_pci_map_bar(dev, + PCI_BASE_ADDRESS_0, PCI_REGION_MEM); + hcor = (struct xhci_hcor *)((uintptr_t) hccr + + HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + + debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", + (u32)hccr, (u32)hcor, + (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase))); + + *ret_hccr = hccr; + *ret_hcor = hcor; + + /* enable busmaster */ + dm_pci_read_config32(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MASTER; + dm_pci_write_config32(dev, PCI_COMMAND, cmd); +} + +static int xhci_pci_probe(struct udevice *dev) +{ + struct xhci_hccr *hccr; + struct xhci_hcor *hcor; + + xhci_pci_init(dev, &hccr, &hcor); + + return xhci_register(dev, hccr, hcor); +} + +static int xhci_pci_remove(struct udevice *dev) +{ + int ret; + + ret = xhci_deregister(dev); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id xhci_pci_ids[] = { + { .compatible = "xhci-pci" }, + { } +}; + +U_BOOT_DRIVER(xhci_pci) = { + .name = "xhci_pci", + .id = UCLASS_USB, + .probe = xhci_pci_probe, + .remove = xhci_pci_remove, + .of_match = xhci_pci_ids, + .ops = &xhci_usb_ops, + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; + +static struct pci_device_id xhci_pci_supported[] = { + { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) }, + {}, +}; + +U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported); + +#endif /* CONFIG_DM_USB */ -- 2.9.0