From patchwork Fri Mar 14 08:33:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beomho Seo X-Patchwork-Id: 330224 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 7E7E22C0108 for ; Fri, 14 Mar 2014 19:34:25 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D7E804B692; Fri, 14 Mar 2014 09:34:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id s+J+-8ruIwcw; Fri, 14 Mar 2014 09:34:11 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A1FF64B693; Fri, 14 Mar 2014 09:33:50 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 96B654B67F for ; Fri, 14 Mar 2014 09:33:43 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AutLi08oTnqV for ; Fri, 14 Mar 2014 09:33:40 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by theia.denx.de (Postfix) with ESMTPS id 530C54B675 for ; Fri, 14 Mar 2014 09:33:36 +0100 (CET) Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N2F003NR3RWSVC0@mailout3.samsung.com> for U-Boot@lists.denx.de; Fri, 14 Mar 2014 17:33:32 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.112]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id FD.68.12635.CDEB2235; Fri, 14 Mar 2014 17:33:32 +0900 (KST) X-AuditID: cbfee68d-b7fcd6d00000315b-3f-5322bedca733 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 01.8D.28157.CDEB2235; Fri, 14 Mar 2014 17:33:32 +0900 (KST) Received: from [10.252.81.134] by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N2F00EEC3RWTJA0@mmp1.samsung.com>; Fri, 14 Mar 2014 17:33:32 +0900 (KST) Message-id: <5322BEDE.4060800@samsung.com> Date: Fri, 14 Mar 2014 17:33:34 +0900 From: Beomho Seo User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0 MIME-version: 1.0 To: U-Boot@lists.denx.de X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprJIsWRmVeSWpSXmKPExsWyRsSkQPfOPqVgg0dnNC1u/GpjtXjzcDOj RceRFkaL240r2Cx2XL7BYrHuyVpWi7d7O9kd2D3O3tnB6NG3ZRVjAFMUl01Kak5mWWqRvl0C V8b2C+vZCybwV7yZtYS1gXEXTxcjJ4eEgInE3ystLBC2mMSFe+vZuhi5OIQEljJKzGqYwg5T 9GLDREaIxCJGibvTGqGc14wSr79MZQKp4hXQkvh0ZCIziM0ioCpx+t1SNhCbTUBT4v2UK2Ar RAUiJOZO3MwGUS8o8WPyPbC4iICExImlzawgNrPAL0aJZc/NQGxhgRiJLz/eMkHEdST2t05j g7DlJTavecsMcoSEwCJ2ib7l75ggFgtIfJt8CGgoB1BCVmLTAWaIDyQlDq64wTKBUWQWktWz kIydhWTsAkbmVYyiqQXJBcVJ6UWGesWJucWleel6yfm5mxiB0XL637PeHYy3D1gfYkwGWjmR WUo0OR8YbXkl8YbGZkYWpiamxkbmlmakCSuJ8yY9TAoSEkhPLEnNTk0tSC2KLyrNSS0+xMjE wSnVwHhqd+js3xkR3dw/PFsXzmK0bmmYbCMXenOrvO77C2+XnlouVxR57PyjLzMSjuUpneuY P7fe4+OWvpD1fh+//UuNV3P7qztp3+nyhC2H6vgdfHsmOD28XZjNp/1h8iT9igeH+eRUvpx6 LBU3cdqPwl8R9VaXOma9esfepjtDgcPl73//91ent2QqsRRnJBpqMRcVJwIA1h8JgKwCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrGIsWRmVeSWpSXmKPExsVy+t9jAd07+5SCDe51Klnc+NXGavHm4WZG i44jLYwWtxtXsFnsuHyDxWLdk7WsFm/3drI7sHucvbOD0aNvyyrGAKaoBkabjNTElNQihdS8 5PyUzLx0WyXv4HjneFMzA0NdQ0sLcyWFvMTcVFslF58AXbfMHKDNSgpliTmlQKGAxOJiJX07 TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaM7RfWsxdM4K94M2sJawPjLp4uRk4OCQETiRcbJjJC 2GISF+6tZ+ti5OIQEljEKHF3WiMjhPOaUeL1l6lMIFW8AloSn45MZAaxWQRUJU6/W8oGYrMJ aEq8n3KFBcQWFYiQmDtxMxtEvaDEj8n3wOIiAhISJ5Y2s4LYzAK/GCWWPTcDsYUFYiS+/HjL BBHXkdjfOo0NwpaX2LzmLfMERr5ZSEbNQlI2C0nZAkbmVYyiqQXJBcVJ6blGesWJucWleel6 yfm5mxjBsfhMegfjqgaLQ4wCHIxKPLwzjioGC7EmlhVX5h5ilOBgVhLhZZinFCzEm5JYWZVa lB9fVJqTWnyIMRno04nMUqLJ+cA0kVcSb2hsYmZkaWRuaGFkbE6asJI478FW60AhgfTEktTs 1NSC1CKYLUwcnFINjGbyR2x5hLY1TJVrrvolrrjXVCTbpvKamRWXRdAEWzdD3cNzuhMsZd5J 27x9H//w0OpzC8PfbEtQ1mR7ffnFan+hkw/NmSJ67cTn852ZduJQUOLPC4+P2z63TPtxvDdA cHfBktJVmo1Vs/ZxPA19dHSO+CeTBSXfqvyn2vDFTanIe2xs5/ZmuRJLcUaioRZzUXEiALh/ 0hIJAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: Piotr Wilczek , Jaehoon Chung , Myungjoo Ham , Przemyslaw Marczak Subject: [U-Boot] [PATCH v2 3/4] arm: exynos: clock: Remove exynos4x12_set_mmc_clk function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de exynos4x12_set_mmc_clk function have been removed. Because exynos4x12_clock and exynos4_clock return same div_fsys* value. Signed-off-by: Beomho Seo Signed-off-by: Jaehoon Chung Cc: Lukasz Majewski Cc: Piotr Wilczek Cc: Minkyu Kang --- Changes for v2: - None. arch/arm/cpu/armv7/exynos/clock.c | 29 +---------------------------- 1 file changed, 1 insertion(+), 28 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 1fea4d6..2c2029a 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) (div & 0xff) << ((dev_index << 4) + 8)); } -/* exynos4x12: set the mmc clock */ -static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) -{ - struct exynos4x12_clock *clk = - (struct exynos4x12_clock *)samsung_get_base_clock(); - unsigned int addr; - - /* - * CLK_DIV_FSYS1 - * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] - * CLK_DIV_FSYS2 - * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] - */ - if (dev_index < 2) { - addr = (unsigned int)&clk->div_fsys1; - } else { - addr = (unsigned int)&clk->div_fsys2; - dev_index -= 2; - } - - clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), - (div & 0xff) << ((dev_index << 4) + 8)); -} - /* exynos5: set the mmc clock */ static void exynos5_set_mmc_clk(int dev_index, unsigned int div) { @@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div) else exynos5_set_mmc_clk(dev_index, div); } else { - if (proid_is_exynos4412()) - exynos4x12_set_mmc_clk(dev_index, div); - else - exynos4_set_mmc_clk(dev_index, div); + exynos4_set_mmc_clk(dev_index, div); } }