From patchwork Tue Jul 9 08:08:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Naumann X-Patchwork-Id: 257661 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 13BC32C04FA for ; Tue, 9 Jul 2013 18:09:58 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5EE2C4AA22; Tue, 9 Jul 2013 10:09:56 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uFnKd9yEl-5T; Tue, 9 Jul 2013 10:09:56 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DD1844A765; Tue, 9 Jul 2013 10:09:53 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 23A554A765 for ; Tue, 9 Jul 2013 10:09:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ebZnHrdbO-P8 for ; Tue, 9 Jul 2013 10:09:44 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from dd5612.kasserver.com (dd5612.kasserver.com [85.13.130.143]) by theia.denx.de (Postfix) with ESMTPS id 6301C4A744 for ; Tue, 9 Jul 2013 10:09:38 +0200 (CEST) Received: from [192.168.240.148] (mail.ultratronik.de [82.100.224.114]) by dd5612.kasserver.com (Postfix) with ESMTPSA id 9384AAA034F for ; Tue, 9 Jul 2013 10:09:37 +0200 (CEST) Message-ID: <51DBC4EA.4090104@andin.de> Date: Tue, 09 Jul 2013 10:08:10 +0200 From: Andreas Naumann User-Agent: Mozilla/5.0 (Windows NT 5.1; rv:17.0) Gecko/20130620 Thunderbird/17.0.7 MIME-Version: 1.0 To: u-boot@lists.denx.de References: <1373356832-28983-1-git-send-email-anaumann@ultratronik.de> In-Reply-To: <1373356832-28983-1-git-send-email-anaumann@ultratronik.de> X-Forwarded-Message-Id: <1373356832-28983-1-git-send-email-anaumann@ultratronik.de> Subject: [U-Boot] [RFC] ARM: omap3: Add option to disable errata workarounds. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Hi, It seems that all three ARM errata workarounds done in omap3 board-init (#454179 #430973 #621766) are solved/not longer needed e.g. in the AM/DM37xx chips. Other people have noticed this: http://e2e.ti.com/support/arm/sitara_arm/f/791/t/254742.aspx When still applying them (especcially #430973), lots of segmentations faults and other strange stuff begin to appear. So as a simple solution I propose adding a config option to remove these workarounds for boards/silicon that dont need them. Is this sensible or should there be more automatism? regards, Andreas PS. Does anybody have the "ARM Core Cortex-A8 (AT400/AT401) errata" document to make sure my assumption above holds true? --- arch/arm/cpu/armv7/omap3/board.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index b72fadc..84045d8 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -236,8 +236,10 @@ void s_init(void) try_unlock_memory(); +#ifndef CONFIG_SYS_DISABLE_CORTEXA8_ERRATA_WORKAROUNDS /* Errata workarounds */ omap3_setup_aux_cr(); +#endif #ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate L2-cache from secure mode */