From patchwork Wed Apr 29 10:33:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 465967 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 99DE21402BD for ; Wed, 29 Apr 2015 20:33:18 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2A5DA4BB5D; Wed, 29 Apr 2015 12:33:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IS-Yj6hLul32; Wed, 29 Apr 2015 12:33:14 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7CCEB4BB4C; Wed, 29 Apr 2015 12:33:14 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5373A4BB4C for ; Wed, 29 Apr 2015 12:33:11 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MAW-q40DWz_f for ; Wed, 29 Apr 2015 12:33:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wg0-f50.google.com (mail-wg0-f50.google.com [74.125.82.50]) by theia.denx.de (Postfix) with ESMTPS id 1C59D4BB4B for ; Wed, 29 Apr 2015 12:33:07 +0200 (CEST) Received: by wgso17 with SMTP id o17so23216526wgs.1 for ; Wed, 29 Apr 2015 03:33:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=a6hwLH/cRQqEQlYVcPfMfIBy6B4qAIUnQJ9fqDHepc8=; b=YBwnb3tRSUl/ztBcYZd6UCW3k5y/mUERl96SN0haVczrDt4LhQQggwkxe4fxSAEm/c O3Fvdtm9l/B2+JrCNA4XWjRP/u0jk6ckTz0nvLnxqvuq/lhKWrRsxJFbUnjE1iu1lsId hJWxXRfbWIjAVuJMgtH+5ZgVgMjGN4htEy3JMUOIU2AxfwN25Hsfn2k0TuZEKfhJumR1 ryWblulK0v0QHrytyQLK0TGwD8NEOFC40m1vkilGjw9VsOo0hr4fynXENK1CbG571Ijq F6dClrCO/+JNTG97a+mzOO1qM6ZMluK1rOAvEDPFGTiQCEBcW8aNOV4EXGLIugh5DWnv /wSw== X-Gm-Message-State: ALoCoQkjTww/0+kgSd12FXTce7L7RgHyk3p1X6/cPJEtu3UUL6GdtjV2rXUQDWloKB2b9Wi9dDKn X-Received: by 10.194.59.79 with SMTP id x15mr39864215wjq.81.1430303587558; Wed, 29 Apr 2015 03:33:07 -0700 (PDT) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by mx.google.com with ESMTPSA id k9sm20577251wia.6.2015.04.29.03.33.06 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Wed, 29 Apr 2015 03:33:06 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de Date: Wed, 29 Apr 2015 12:33:05 +0200 Message-Id: <471ab882131549d09007d2aa015b073c2180d74c.1430303581.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.3.5 Cc: Tom Rini , Mike Looijmans , Siva Durga Prasad Paladugu Subject: [U-Boot] [PATCH] zynq: Use system timer implementation instead of our X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use error-prone system timer implementation to simplify our code. The generic code is proven and it is easier to maintain. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/include/mach/hardware.h | 1 - arch/arm/mach-zynq/timer.c | 83 +----------------------------- include/configs/zynq-common.h | 5 ++ 3 files changed, 6 insertions(+), 83 deletions(-) diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h index e2e0b7321ad4..9a51d6ba3b5e 100644 --- a/arch/arm/mach-zynq/include/mach/hardware.h +++ b/arch/arm/mach-zynq/include/mach/hardware.h @@ -12,7 +12,6 @@ #define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 #define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 #define ZYNQ_SCU_BASEADDR 0xF8F00000 -#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 #define ZYNQ_GEM_BASEADDR0 0xE000B000 #define ZYNQ_GEM_BASEADDR1 0xE000C000 #define ZYNQ_SDHCI_BASEADDR0 0xE0100000 diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 5ed9642df9b3..8ff82dc9306e 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -78,91 +78,10 @@ int timer_init(void) } /* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -ulong get_timer_masked(void) -{ - ulong now; - - now = readl(&timer_base->counter) / - (gd->arch.timer_rate_hz / CONFIG_SYS_HZ); - - if (gd->arch.lastinc >= now) { - /* Normal mode */ - gd->arch.tbl += gd->arch.lastinc - now; - } else { - /* We have an overflow ... */ - gd->arch.tbl += gd->arch.lastinc + (TIMER_LOAD_VAL / - (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - - now + 1; - } - gd->arch.lastinc = now; - - return gd->arch.tbl; -} - -void __udelay(unsigned long usec) -{ - u32 countticks; - u32 timeend; - u32 timediff; - u32 timenow; - - if (usec == 0) - return; - - countticks = lldiv(((unsigned long long)gd->arch.timer_rate_hz * usec), - 1000000); - - /* decrementing timer */ - timeend = readl(&timer_base->counter) - countticks; - -#if TIMER_LOAD_VAL != 0xFFFFFFFF - /* do not manage multiple overflow */ - if (countticks >= TIMER_LOAD_VAL) - countticks = TIMER_LOAD_VAL - 1; -#endif - - do { - timenow = readl(&timer_base->counter); - - if (timenow >= timeend) { - /* normal case */ - timediff = timenow - timeend; - } else { - if ((TIMER_LOAD_VAL - timeend + timenow) <= - countticks) { - /* overflow */ - timediff = TIMER_LOAD_VAL - timeend + timenow; - } else { - /* missed the exact match */ - break; - } - } - } while (timediff > 0); -} - -/* Timer without interrupts */ -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* * This function is derived from PowerPC code (timebase clock frequency). * On ARM it returns the number of timer ticks per second. */ ulong get_tbclk(void) { - return CONFIG_SYS_HZ; + return gd->arch.timer_rate_hz; } diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b83e037f6f59..5297e6bcc8ff 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -25,6 +25,11 @@ # define CONFIG_SYS_PL310_BASE 0xf8f02000 #endif +#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 +#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR +#define CONFIG_SYS_TIMER_COUNTS_DOWN +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) + /* Serial drivers */ #define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */