| Message ID | 43cd2fe86b51f1377a2cebb15f0f7c50be1c78b3.1637237308.git.michal.simek@xilinx.com |
|---|---|
| State | Superseded |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | net: zynq: Add support for GEM reset | expand |
On Thu, Nov 18, 2021 at 2:08 PM Michal Simek <michal.simek@xilinx.com> wrote: > > Perform reset before core initialization. Does it fix any apparent issue ? How did it work before that ? > > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c > index 91957757727d..5cbe8d28304b 100644 > --- a/drivers/net/zynq_gem.c > +++ b/drivers/net/zynq_gem.c > @@ -21,6 +21,7 @@ > #include <asm/cache.h> > #include <asm/io.h> > #include <phy.h> > +#include <reset.h> > #include <miiphy.h> > #include <wait_bit.h> > #include <watchdog.h> > @@ -217,6 +218,7 @@ struct zynq_gem_priv { > bool int_pcs; > bool dma_64bit; > u32 clk_en_info; > + struct reset_ctl_bulk resets; > }; > > static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, > @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, > return phywrite(priv, addr, reg, value); > } > > +static int zynq_gem_reset_init(struct udevice *dev) > +{ > + struct zynq_gem_priv *priv = dev_get_priv(dev); > + int ret; > + > + ret = reset_get_bulk(dev, &priv->resets); > + if (ret == -ENOTSUPP || ret == -ENOENT) > + return 0; > + else if (ret) > + return ret; > + > + ret = reset_deassert_bulk(&priv->resets); > + if (ret) { > + reset_release_bulk(&priv->resets); > + return ret; > + } > + > + return 0; > +} > + > static int zynq_gem_probe(struct udevice *dev) > { > void *bd_space; > struct zynq_gem_priv *priv = dev_get_priv(dev); > int ret; > > + ret = zynq_gem_reset_init(dev); > + if (ret) > + return ret; > + > /* Align rxbuffers to ARCH_DMA_MINALIGN */ > priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); > if (!priv->rxbuffers) > -- > 2.33.1 >
On 11/21/21 20:12, Ramon Fried wrote: > On Thu, Nov 18, 2021 at 2:08 PM Michal Simek <michal.simek@xilinx.com> wrote: >> >> Perform reset before core initialization. > Does it fix any apparent issue ? How did it work before that ? Standard flow which I would say close to 99% users are using getting all IPs out of reset that there is no need to reset IP again. This is because of all low level initialization is done in previous bootloader stage. In SOM case which we are working on these IPs are not touched by previous bootloader stage that's why reset needs to be called before IP is accessed to make sure that it is in correct state. Thanks, Michal >> >> Signed-off-by: Michal Simek <michal.simek@xilinx.com> >> --- >> >> drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++ >> 1 file changed, 26 insertions(+) >> >> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c >> index 91957757727d..5cbe8d28304b 100644 >> --- a/drivers/net/zynq_gem.c >> +++ b/drivers/net/zynq_gem.c >> @@ -21,6 +21,7 @@ >> #include <asm/cache.h> >> #include <asm/io.h> >> #include <phy.h> >> +#include <reset.h> >> #include <miiphy.h> >> #include <wait_bit.h> >> #include <watchdog.h> >> @@ -217,6 +218,7 @@ struct zynq_gem_priv { >> bool int_pcs; >> bool dma_64bit; >> u32 clk_en_info; >> + struct reset_ctl_bulk resets; >> }; >> >> static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, >> @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, >> return phywrite(priv, addr, reg, value); >> } >> >> +static int zynq_gem_reset_init(struct udevice *dev) >> +{ >> + struct zynq_gem_priv *priv = dev_get_priv(dev); >> + int ret; >> + >> + ret = reset_get_bulk(dev, &priv->resets); >> + if (ret == -ENOTSUPP || ret == -ENOENT) >> + return 0; >> + else if (ret) >> + return ret; >> + >> + ret = reset_deassert_bulk(&priv->resets); >> + if (ret) { >> + reset_release_bulk(&priv->resets); >> + return ret; >> + } >> + >> + return 0; >> +} >> + >> static int zynq_gem_probe(struct udevice *dev) >> { >> void *bd_space; >> struct zynq_gem_priv *priv = dev_get_priv(dev); >> int ret; >> >> + ret = zynq_gem_reset_init(dev); >> + if (ret) >> + return ret; >> + >> /* Align rxbuffers to ARCH_DMA_MINALIGN */ >> priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); >> if (!priv->rxbuffers) >> -- >> 2.33.1 >>
On Mon, Nov 22, 2021 at 9:34 AM Michal Simek <michal.simek@xilinx.com> wrote: > > > > On 11/21/21 20:12, Ramon Fried wrote: > > On Thu, Nov 18, 2021 at 2:08 PM Michal Simek <michal.simek@xilinx.com> wrote: > >> > >> Perform reset before core initialization. > > Does it fix any apparent issue ? How did it work before that ? > > Standard flow which I would say close to 99% users are using getting all > IPs out of reset that there is no need to reset IP again. This is > because of all low level initialization is done in previous bootloader > stage. > In SOM case which we are working on these IPs are not touched by > previous bootloader stage that's why reset needs to be called before IP > is accessed to make sure that it is in correct state. > > Thanks, > Michal > > > >> > >> Signed-off-by: Michal Simek <michal.simek@xilinx.com> > >> --- > >> > >> drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++ > >> 1 file changed, 26 insertions(+) > >> > >> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c > >> index 91957757727d..5cbe8d28304b 100644 > >> --- a/drivers/net/zynq_gem.c > >> +++ b/drivers/net/zynq_gem.c > >> @@ -21,6 +21,7 @@ > >> #include <asm/cache.h> > >> #include <asm/io.h> > >> #include <phy.h> > >> +#include <reset.h> > >> #include <miiphy.h> > >> #include <wait_bit.h> > >> #include <watchdog.h> > >> @@ -217,6 +218,7 @@ struct zynq_gem_priv { > >> bool int_pcs; > >> bool dma_64bit; > >> u32 clk_en_info; > >> + struct reset_ctl_bulk resets; > >> }; > >> > >> static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, > >> @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, > >> return phywrite(priv, addr, reg, value); > >> } > >> > >> +static int zynq_gem_reset_init(struct udevice *dev) > >> +{ > >> + struct zynq_gem_priv *priv = dev_get_priv(dev); > >> + int ret; > >> + > >> + ret = reset_get_bulk(dev, &priv->resets); > >> + if (ret == -ENOTSUPP || ret == -ENOENT) > >> + return 0; > >> + else if (ret) > >> + return ret; > >> + > >> + ret = reset_deassert_bulk(&priv->resets); > >> + if (ret) { > >> + reset_release_bulk(&priv->resets); > >> + return ret; > >> + } > >> + > >> + return 0; > >> +} > >> + > >> static int zynq_gem_probe(struct udevice *dev) > >> { > >> void *bd_space; > >> struct zynq_gem_priv *priv = dev_get_priv(dev); > >> int ret; > >> > >> + ret = zynq_gem_reset_init(dev); > >> + if (ret) > >> + return ret; > >> + > >> /* Align rxbuffers to ARCH_DMA_MINALIGN */ > >> priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); > >> if (!priv->rxbuffers) > >> -- > >> 2.33.1 > >> Can you add the above description to the commit message ?
On 11/22/21 11:33, Ramon Fried wrote: > On Mon, Nov 22, 2021 at 9:34 AM Michal Simek <michal.simek@xilinx.com> wrote: >> >> >> >> On 11/21/21 20:12, Ramon Fried wrote: >>> On Thu, Nov 18, 2021 at 2:08 PM Michal Simek <michal.simek@xilinx.com> wrote: >>>> >>>> Perform reset before core initialization. >>> Does it fix any apparent issue ? How did it work before that ? >> >> Standard flow which I would say close to 99% users are using getting all >> IPs out of reset that there is no need to reset IP again. This is >> because of all low level initialization is done in previous bootloader >> stage. >> In SOM case which we are working on these IPs are not touched by >> previous bootloader stage that's why reset needs to be called before IP >> is accessed to make sure that it is in correct state. >> >> Thanks, >> Michal >> >> >>>> >>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com> >>>> --- >>>> >>>> drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++ >>>> 1 file changed, 26 insertions(+) >>>> >>>> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c >>>> index 91957757727d..5cbe8d28304b 100644 >>>> --- a/drivers/net/zynq_gem.c >>>> +++ b/drivers/net/zynq_gem.c >>>> @@ -21,6 +21,7 @@ >>>> #include <asm/cache.h> >>>> #include <asm/io.h> >>>> #include <phy.h> >>>> +#include <reset.h> >>>> #include <miiphy.h> >>>> #include <wait_bit.h> >>>> #include <watchdog.h> >>>> @@ -217,6 +218,7 @@ struct zynq_gem_priv { >>>> bool int_pcs; >>>> bool dma_64bit; >>>> u32 clk_en_info; >>>> + struct reset_ctl_bulk resets; >>>> }; >>>> >>>> static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, >>>> @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, >>>> return phywrite(priv, addr, reg, value); >>>> } >>>> >>>> +static int zynq_gem_reset_init(struct udevice *dev) >>>> +{ >>>> + struct zynq_gem_priv *priv = dev_get_priv(dev); >>>> + int ret; >>>> + >>>> + ret = reset_get_bulk(dev, &priv->resets); >>>> + if (ret == -ENOTSUPP || ret == -ENOENT) >>>> + return 0; >>>> + else if (ret) >>>> + return ret; >>>> + >>>> + ret = reset_deassert_bulk(&priv->resets); >>>> + if (ret) { >>>> + reset_release_bulk(&priv->resets); >>>> + return ret; >>>> + } >>>> + >>>> + return 0; >>>> +} >>>> + >>>> static int zynq_gem_probe(struct udevice *dev) >>>> { >>>> void *bd_space; >>>> struct zynq_gem_priv *priv = dev_get_priv(dev); >>>> int ret; >>>> >>>> + ret = zynq_gem_reset_init(dev); >>>> + if (ret) >>>> + return ret; >>>> + >>>> /* Align rxbuffers to ARCH_DMA_MINALIGN */ >>>> priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); >>>> if (!priv->rxbuffers) >>>> -- >>>> 2.33.1 >>>> > Can you add the above description to the commit message ? > sure. v2 sent. M
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 91957757727d..5cbe8d28304b 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -21,6 +21,7 @@ #include <asm/cache.h> #include <asm/io.h> #include <phy.h> +#include <reset.h> #include <miiphy.h> #include <wait_bit.h> #include <watchdog.h> @@ -217,6 +218,7 @@ struct zynq_gem_priv { bool int_pcs; bool dma_64bit; u32 clk_en_info; + struct reset_ctl_bulk resets; }; static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, @@ -688,12 +690,36 @@ static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, return phywrite(priv, addr, reg, value); } +static int zynq_gem_reset_init(struct udevice *dev) +{ + struct zynq_gem_priv *priv = dev_get_priv(dev); + int ret; + + ret = reset_get_bulk(dev, &priv->resets); + if (ret == -ENOTSUPP || ret == -ENOENT) + return 0; + else if (ret) + return ret; + + ret = reset_deassert_bulk(&priv->resets); + if (ret) { + reset_release_bulk(&priv->resets); + return ret; + } + + return 0; +} + static int zynq_gem_probe(struct udevice *dev) { void *bd_space; struct zynq_gem_priv *priv = dev_get_priv(dev); int ret; + ret = zynq_gem_reset_init(dev); + if (ret) + return ret; + /* Align rxbuffers to ARCH_DMA_MINALIGN */ priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); if (!priv->rxbuffers)
Perform reset before core initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- drivers/net/zynq_gem.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)