@@ -63,6 +63,8 @@ struct crlapb_regs {
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
+#define ZYNQMP_IOU_SECURE_SLCR 0xFF240000
+
#define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2
@@ -72,6 +72,10 @@ int __maybe_unused psu_uboot_init(void)
writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL,
ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS);
+ /* Disable secure access for boot devices */
+ writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR);
+ writel(0x00920492, ZYNQMP_IOU_SECURE_SLCR + 4);
+
/* Delay is required for clocks to be propagated */
udelay(1000000);
Boot devices (QSPI, MMC, NAND, and Ethernet) use secure access for DMA by default. As this causes problems when using the SMMU [1], configure them for normal access instead. [1] https://support.xilinx.com/s/article/72164 Signed-off-by: Sean Anderson <sean.anderson@linux.dev> --- Changes in v2: - Don't set reserved bits in AXI_RPRTCN, since QSPI doesn't use ARPROT arch/arm/mach-zynqmp/include/mach/hardware.h | 2 ++ board/xilinx/zynqmp/zynqmp.c | 4 ++++ 2 files changed, 6 insertions(+)