@@ -547,6 +547,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_agilex_socdk.dtb \
socfpga_agilex5_socdk.dtb \
+ socfpga_agilex7m_socdk.dtb \
socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \
socfpga_arria10_chameleonv3_270_2.dtb \
@@ -65,6 +65,21 @@ obj-y += reset_manager_s10.o
obj-y += wrap_pll_config_soc64.o
endif
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX7M
+obj-y += clock_manager_agilex.o
+obj-y += lowlevel_init_soc64.o
+obj-y += mailbox_s10.o
+obj-y += misc_soc64.o
+obj-y += mmu-arm64_s10.o
+obj-y += reset_manager_s10.o
+obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o
+obj-y += system_manager_soc64.o
+obj-y += timer_s10.o
+obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o
+obj-y += wrap_handoff_soc64.o
+obj-y += wrap_pll_config_soc64.o
+endif
+
ifdef CONFIG_TARGET_SOCFPGA_N5X
obj-y += clock_manager_n5x.o
obj-y += lowlevel_init_soc64.o
@@ -107,6 +122,9 @@ endif
ifdef CONFIG_TARGET_SOCFPGA_AGILEX5
obj-y += spl_soc64.o
endif
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX7M
+obj-y += spl_agilex7m.o
+endif
else
obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o
obj-$(CONFIG_SPL_ATF) += smc_api.o
new file mode 100644
@@ -0,0 +1,7 @@
+
+# Copyright (C) 2024 Intel Corporation <www.intel.com>
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y := socfpga.o