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[v1,2/2] arm: dts: k3-am625-verdin: Enable LPDDR4 WDQS control

Message ID 20240515080058.1530985-3-ghidoliemanuele@gmail.com
State New
Delegated to: Tom Rini
Headers show
Series arm: dts: k3-am625-verdin: Enable LPDDR4 WDQS control | expand

Commit Message

Emanuele Ghidoli May 15, 2024, 8 a.m. UTC 
From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Manually, since SysConfig tool do not have the relevant option,
set PHY_LP4_WDQS_OE_EXTEND to 1.
Since WDQS control mode is required on our modules LPDDR4,
this enables WDQS control mode 1.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
---
 arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
index ca883ae82c7d..5062447547b6 100644
--- a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
@@ -850,7 +850,7 @@ 
 #define DDRSS_PHY_62_DATA 0x00000000
 #define DDRSS_PHY_63_DATA 0x00000000
 #define DDRSS_PHY_64_DATA 0x00000000
-#define DDRSS_PHY_65_DATA 0x00000004
+#define DDRSS_PHY_65_DATA 0x00000104
 #define DDRSS_PHY_66_DATA 0x00000000
 #define DDRSS_PHY_67_DATA 0x00000000
 #define DDRSS_PHY_68_DATA 0x00000000
@@ -1106,7 +1106,7 @@ 
 #define DDRSS_PHY_318_DATA 0x00000000
 #define DDRSS_PHY_319_DATA 0x00000000
 #define DDRSS_PHY_320_DATA 0x00000000
-#define DDRSS_PHY_321_DATA 0x00000004
+#define DDRSS_PHY_321_DATA 0x00000104
 #define DDRSS_PHY_322_DATA 0x00000000
 #define DDRSS_PHY_323_DATA 0x00000000
 #define DDRSS_PHY_324_DATA 0x00000000