@@ -4,3 +4,15 @@
*/
#include "rockchip-u-boot.dtsi"
+
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
@@ -24,6 +24,5 @@
};
&gpio6 {
- status = "disabled";
+ gpio-ranges = <&pinctrl 0 160 16>;
};
-
@@ -14,6 +14,22 @@
bootph-all;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
&grf {
bootph-all;
};
@@ -47,6 +47,22 @@
max-frequency = <150000000>;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
&grf {
bootph-all;
};
@@ -95,8 +95,41 @@
clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 24>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 24 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 56 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 88 32>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 120 32>;
+};
+
+&gpio5 {
+ gpio-ranges = <&pinctrl 0 152 32>;
+};
+
+&gpio6 {
+ gpio-ranges = <&pinctrl 0 184 32>;
+};
+
&gpio7 {
bootph-all;
+ gpio-ranges = <&pinctrl 0 216 32>;
+};
+
+&gpio8 {
+ gpio-ranges = <&pinctrl 0 248 16>;
};
&grf {
@@ -70,6 +70,26 @@
bootph-some-ram;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 128 32>;
+};
+
&grf {
bootph-all;
};
@@ -57,6 +57,19 @@
&gpio0 {
bootph-pre-ram;
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
};
&grf {
@@ -26,3 +26,19 @@
reg = <0x0 0xff740000 0x0 0x1000>;
};
};
+
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
@@ -80,6 +80,26 @@
bootph-some-ram;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 128 32>;
+};
+
&grf {
bootph-all;
};
@@ -5,6 +5,22 @@
#include "rockchip-u-boot.dtsi"
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
&grf {
bootph-all;
};
@@ -31,10 +31,24 @@
&gpio0 {
bootph-pre-ram;
+ gpio-ranges = <&pinctrl 0 0 32>;
};
&gpio1 {
bootph-pre-ram;
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 128 2>;
};
&grf {
Add gpio-ranges props to supported SoCs based on the following Linux patches: ARM: dts: rockchip: add gpio-ranges property to gpio nodes https://lore.kernel.org/all/26007385-81dc-9961-05d5-8b9a0969d0b6@gmail.com/ arm64: dts: rockchip: add gpio-ranges property to gpio nodes https://lore.kernel.org/all/18c8c89a-9962-40f0-814f-81e2c420c957@gmail.com/ For RK3066 and RK3288 the gpio-ranges props is adjusted to match https://lore.kernel.org/all/541b7633-af3b-4392-ac29-7ee1f2c6f943@kwiboo.se/ Re-enable gpio6 on RK3066 now that the pinctrl pin offset is used with get_gpio_mux(). Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- Cc: Johan Jonker <jbx6244@gmail.com> --- arch/arm/dts/rk3036-u-boot.dtsi | 12 ++++++++++++ arch/arm/dts/rk3066a-u-boot.dtsi | 3 +-- arch/arm/dts/rk3128-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rk322x-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rk3288-u-boot.dtsi | 33 ++++++++++++++++++++++++++++++++ arch/arm/dts/rk3308-u-boot.dtsi | 20 +++++++++++++++++++ arch/arm/dts/rk3328-u-boot.dtsi | 13 +++++++++++++ arch/arm/dts/rk3368-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rk3399-u-boot.dtsi | 20 +++++++++++++++++++ arch/arm/dts/rv1108-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rv1126-u-boot.dtsi | 14 ++++++++++++++ 11 files changed, 177 insertions(+), 2 deletions(-)