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[188.129.45.161]) by smtp.googlemail.com with ESMTPSA id c19-20020a170906155300b00a526a99ccecsm624322ejd.42.2024.04.18.02.14.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 02:14:39 -0700 (PDT) From: Robert Marko To: trini@konsulko.com, caleb.connolly@linaro.org, neil.armstrong@linaro.org, sumit.garg@linaro.org, u-boot@lists.denx.de Cc: j.beck@linefinity.com, Robert Marko Subject: [PATCH 2/3] mach-ipq40xx: import GPIO header from mach-snapgradon Date: Thu, 18 Apr 2024 11:14:03 +0200 Message-ID: <20240418091435.18232-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240418091435.18232-1-robert.marko@sartura.hr> References: <20240418091435.18232-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Pinctrl driver was refactored and moved, but the required header that it depends on was not included. Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx") Signed-off-by: Robert Marko --- arch/arm/mach-ipq40xx/include/mach/gpio.h | 37 +++++++++++++++++++---- 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h b/arch/arm/mach-ipq40xx/include/mach/gpio.h index a45747c0fe..53c6ae0649 100644 --- a/arch/arm/mach-ipq40xx/include/mach/gpio.h +++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h @@ -1,10 +1,35 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Empty gpio.h + * Qualcomm common pin control data. * - * This file must stay as arch/arm/include/asm/gpio.h requires it. - * - * Copyright (c) 2019 Sartura Ltd. - * - * Author: Robert Marko + * Copyright (C) 2023 Linaro Ltd. */ +#ifndef _QCOM_GPIO_H_ +#define _QCOM_GPIO_H_ + +#include +#include + +struct msm_pin_data { + int pin_count; + const unsigned int *pin_offsets; + /* Index of first special pin, these are ignored for now */ + unsigned int special_pins_start; +}; + +static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector) +{ + u32 out = (selector * 0x1000); + + if (offs) + return out + offs[selector]; + + return out; +} + +static inline bool qcom_is_special_pin(const struct msm_pin_data *pindata, unsigned int pin) +{ + return pindata->special_pins_start && pin >= pindata->special_pins_start; +} + +#endif /* _QCOM_GPIO_H_ */