Message ID | 20240331202921.262323-13-jonas@kwiboo.se |
---|---|
State | Changes Requested |
Delegated to: | Kever Yang |
Headers | show |
Series | rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs | expand |
On 2024/4/1 04:28, Jonas Karlman wrote: > rk3399.dtsi from linux v5.19 and newer try to set VDU clock rate to > 400 MHz using an assigned-clock-rates prop of the CRU node. > > U-Boot does not use or need this clock so add dummy support for getting > and setting ACLK_VDU clock rate to allow CRU driver to be loaded with an > updated rk3399.dtsi. > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > drivers/clk/rockchip/clk_rk3399.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c > index f0ce54067f8c..5934771b4096 100644 > --- a/drivers/clk/rockchip/clk_rk3399.c > +++ b/drivers/clk/rockchip/clk_rk3399.c > @@ -971,6 +971,7 @@ static ulong rk3399_clk_get_rate(struct clk *clk) > case ACLK_HDCP: > case ACLK_GIC_PRE: > case PCLK_DDR: > + case ACLK_VDU: > break; > case PCLK_ALIVE: > case PCLK_WDT: > @@ -1061,6 +1062,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) > case ACLK_HDCP: > case ACLK_GIC_PRE: > case PCLK_DDR: > + case ACLK_VDU: > return 0; > default: > log_debug("Unknown clock %lu\n", clk->id);
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index f0ce54067f8c..5934771b4096 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -971,6 +971,7 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case ACLK_HDCP: case ACLK_GIC_PRE: case PCLK_DDR: + case ACLK_VDU: break; case PCLK_ALIVE: case PCLK_WDT: @@ -1061,6 +1062,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case ACLK_HDCP: case ACLK_GIC_PRE: case PCLK_DDR: + case ACLK_VDU: return 0; default: log_debug("Unknown clock %lu\n", clk->id);
rk3399.dtsi from linux v5.19 and newer try to set VDU clock rate to 400 MHz using an assigned-clock-rates prop of the CRU node. U-Boot does not use or need this clock so add dummy support for getting and setting ACLK_VDU clock rate to allow CRU driver to be loaded with an updated rk3399.dtsi. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- drivers/clk/rockchip/clk_rk3399.c | 2 ++ 1 file changed, 2 insertions(+)