diff mbox series

mtd: nand: raw: mt7621-nand: allow writing ecc region in raw mode

Message ID 20240313033732.77733-1-weijie.gao@mediatek.com
State Changes Requested
Delegated to: Dario Binacchi
Headers show
Series mtd: nand: raw: mt7621-nand: allow writing ecc region in raw mode | expand

Commit Message

Weijie Gao (高惟杰) March 13, 2024, 3:37 a.m. UTC
Allow writing ecc parity region in raw mode. This makes sure the
nand write.raw command can write the flash data as-is.

Change-Id: Ibed3bdf13c9cf81e54041c5ac7a78192b97dcedc
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
CR-Id: WCNCR00180092
---
 drivers/mtd/nand/raw/mt7621_nand.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Michael Nazzareno Trimarchi March 13, 2024, 6:41 a.m. UTC | #1
Hi

On Wed, Mar 13, 2024 at 4:38 AM Weijie Gao <weijie.gao@mediatek.com> wrote:
>
> Allow writing ecc parity region in raw mode. This makes sure the
> nand write.raw command can write the flash data as-is.
>
> Change-Id: Ibed3bdf13c9cf81e54041c5ac7a78192b97dcedc
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> CR-Id: WCNCR00180092

I think this is for internal tracking

> ---
>  drivers/mtd/nand/raw/mt7621_nand.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/mt7621_nand.c b/drivers/mtd/nand/raw/mt7621_nand.c
> index f6eddb84a9..341ef0bf2d 100644
> --- a/drivers/mtd/nand/raw/mt7621_nand.c
> +++ b/drivers/mtd/nand/raw/mt7621_nand.c
> @@ -1003,9 +1003,9 @@ static int mt7621_nfc_write_page_raw(struct mtd_info *mtd,
>                 mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
>                                       NFI_FDM_SIZE);
>
> -               /* Write dummy ECC parity data */
> -               mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector -
> -                                           NFI_FDM_SIZE);
> +               /* Write ECC parity data */
> +               mt7621_nfc_write_data(nfc, oob_ecc_ptr(nfc, i),
> +                                     nfc->spare_per_sector - NFI_FDM_SIZE);
>         }
>

Please describe better what regression you are trying to fix in the
commit message
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>

Michael

>         mt7621_nfc_wait_write_completion(nfc, nand);
> --
> 2.34.1
>
Weijie Gao (高惟杰) March 15, 2024, 7:59 a.m. UTC | #2
On Wed, 2024-03-13 at 07:41 +0100, Michael Nazzareno Trimarchi wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  Hi
> 
> On Wed, Mar 13, 2024 at 4:38 AM Weijie Gao <weijie.gao@mediatek.com>
> wrote:
> >
> > Allow writing ecc parity region in raw mode. This makes sure the
> > nand write.raw command can write the flash data as-is.
> >
> > Change-Id: Ibed3bdf13c9cf81e54041c5ac7a78192b97dcedc
> > Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> > CR-Id: WCNCR00180092
> 
> I think this is for internal tracking
> 
> > ---
> >  drivers/mtd/nand/raw/mt7621_nand.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/mt7621_nand.c
> b/drivers/mtd/nand/raw/mt7621_nand.c
> > index f6eddb84a9..341ef0bf2d 100644
> > --- a/drivers/mtd/nand/raw/mt7621_nand.c
> > +++ b/drivers/mtd/nand/raw/mt7621_nand.c
> > @@ -1003,9 +1003,9 @@ static int mt7621_nfc_write_page_raw(struct
> mtd_info *mtd,
> >                 mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
> >                                       NFI_FDM_SIZE);
> >
> > -               /* Write dummy ECC parity data */
> > -               mt7621_nfc_write_data_empty(nfc, nfc-
> >spare_per_sector -
> > -                                           NFI_FDM_SIZE);
> > +               /* Write ECC parity data */
> > +               mt7621_nfc_write_data(nfc, oob_ecc_ptr(nfc, i),
> > +                                     nfc->spare_per_sector -
> NFI_FDM_SIZE);
> >         }
> >
> 
> Please describe better what regression you are trying to fix in the
> commit message
> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>

In fact this patch is not fixing any regression. It just provide the
ability to read/write the whole NAND page with ECC disabled.
Users/developers can the be able to debug NAND related issue or do
anything they want.

> 
> Michael
> 
> >         mt7621_nfc_wait_write_completion(nfc, nand);
> > --
> > 2.34.1
> >
> 
>
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/mt7621_nand.c b/drivers/mtd/nand/raw/mt7621_nand.c
index f6eddb84a9..341ef0bf2d 100644
--- a/drivers/mtd/nand/raw/mt7621_nand.c
+++ b/drivers/mtd/nand/raw/mt7621_nand.c
@@ -1003,9 +1003,9 @@  static int mt7621_nfc_write_page_raw(struct mtd_info *mtd,
 		mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
 				      NFI_FDM_SIZE);
 
-		/* Write dummy ECC parity data */
-		mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector -
-					    NFI_FDM_SIZE);
+		/* Write ECC parity data */
+		mt7621_nfc_write_data(nfc, oob_ecc_ptr(nfc, i),
+				      nfc->spare_per_sector - NFI_FDM_SIZE);
 	}
 
 	mt7621_nfc_wait_write_completion(nfc, nand);