| Message ID | 20240114180741.2114-4-seashell11234455@gmail.com |
|---|---|
| State | Superseded |
| Delegated to: | Andes |
| Headers | show |
| Series | riscv: sophgo: milkv_duo: add support for Milk-V Duo board | expand |
On 1/14/24 19:07, Kongyang Liu wrote: > Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC. > > Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> > --- > > (no changes since v1) > > doc/board/index.rst | 1 + > doc/board/sophgo/index.rst | 8 ++++++ > doc/board/sophgo/milkv_duo.rst | 50 ++++++++++++++++++++++++++++++++++ > 3 files changed, 59 insertions(+) > create mode 100644 doc/board/sophgo/index.rst > create mode 100644 doc/board/sophgo/milkv_duo.rst > > diff --git a/doc/board/index.rst b/doc/board/index.rst > index 531e547e7e..a0bd534742 100644 > --- a/doc/board/index.rst > +++ b/doc/board/index.rst > @@ -45,6 +45,7 @@ Board-specific doc > sifive/index > sipeed/index > socionext/index > + sophgo/index > st/index > starfive/index > ste/index > diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst > new file mode 100644 > index 0000000000..e097afdac6 > --- /dev/null > +++ b/doc/board/sophgo/index.rst > @@ -0,0 +1,8 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > + > +Sophgo > +====== > +.. toctree:: > + :maxdepth: 1 > + > + milkv_duo > diff --git a/doc/board/sophgo/milkv_duo.rst b/doc/board/sophgo/milkv_duo.rst > new file mode 100644 > index 0000000000..b63304b510 > --- /dev/null > +++ b/doc/board/sophgo/milkv_duo.rst > @@ -0,0 +1,50 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > + > +Milk-V Duo > +========== > + > +CV1800B RISC-V SoC > +------------------ > +The CV1800B is a high-performance, low-power 1+1 64-bit RISC-V SoC from Sophgo. > + > +Mainline support > +---------------- > +The support for following drivers are already enabled: > +1. ns16550 UART Driver. > + > +Building > +~~~~~~~~ > +1. Add the RISC-V toolchain to your PATH. > +2. Setup ARCH & cross compilation environment variable: > + > +.. code-block:: console > + > + export CROSS_COMPILE=<riscv64 toolchain prefix> > + cd <U-Boot-dir> > + make milkv_duo_defconfig > + make > + > +This will generate u-boot-dtb.bin > + > +Booting > +~~~~~~~ > +Currently, we rely on vendor FSBL(First Stage Boot Loader) to initialize the > +clock and load the u-boot image, then bootup from it. Thank you for providing documentation for the board. Could you please, additionally describe the procedure to run u-boot-dtb.bin on top of FSBL. Best regards Heinrich > + > +Sample boot log from Milk-V Duo board > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > +.. code-block:: none > + > + U-Boot 2024.01-rc5-00010-g51965baa36 (Dec 28 2023 - 13:15:53 +0800)milkv_duo > + > + DRAM: 63.3 MiB > + Core: 10 devices, 8 uclasses, devicetree: separate > + Loading Environment from nowhere... OK > + In: serial@4140000 > + Out: serial@4140000 > + Err: serial@4140000 > + Net: No ethernet found. > + milkv_duo# cpu detail > + 0: cpu@0 rv64imafdc > + ID = 0, freq = 0 Hz: L1 cache, MMU > + milkv_duo#
Heinrich Schuchardt <xypron.glpk@gmx.de> 于2024年1月15日周一 05:27写道： > > On 1/14/24 19:07, Kongyang Liu wrote: > > Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC. > > > > Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> > > --- > > > > (no changes since v1) > > > > doc/board/index.rst | 1 + > > doc/board/sophgo/index.rst | 8 ++++++ > > doc/board/sophgo/milkv_duo.rst | 50 ++++++++++++++++++++++++++++++++++ > > 3 files changed, 59 insertions(+) > > create mode 100644 doc/board/sophgo/index.rst > > create mode 100644 doc/board/sophgo/milkv_duo.rst > > > > diff --git a/doc/board/index.rst b/doc/board/index.rst > > index 531e547e7e..a0bd534742 100644 > > --- a/doc/board/index.rst > > +++ b/doc/board/index.rst > > @@ -45,6 +45,7 @@ Board-specific doc > > sifive/index > > sipeed/index > > socionext/index > > + sophgo/index > > st/index > > starfive/index > > ste/index > > diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst > > new file mode 100644 > > index 0000000000..e097afdac6 > > --- /dev/null > > +++ b/doc/board/sophgo/index.rst > > @@ -0,0 +1,8 @@ > > +.. SPDX-License-Identifier: GPL-2.0+ > > + > > +Sophgo > > +====== > > +.. toctree:: > > + :maxdepth: 1 > > + > > + milkv_duo > > diff --git a/doc/board/sophgo/milkv_duo.rst b/doc/board/sophgo/milkv_duo.rst > > new file mode 100644 > > index 0000000000..b63304b510 > > --- /dev/null > > +++ b/doc/board/sophgo/milkv_duo.rst > > @@ -0,0 +1,50 @@ > > +.. SPDX-License-Identifier: GPL-2.0+ > > + > > +Milk-V Duo > > +========== > > + > > +CV1800B RISC-V SoC > > +------------------ > > +The CV1800B is a high-performance, low-power 1+1 64-bit RISC-V SoC from Sophgo. > > + > > +Mainline support > > +---------------- > > +The support for following drivers are already enabled: > > +1. ns16550 UART Driver. > > + > > +Building > > +~~~~~~~~ > > +1. Add the RISC-V toolchain to your PATH. > > +2. Setup ARCH & cross compilation environment variable: > > + > > +.. code-block:: console > > + > > + export CROSS_COMPILE=<riscv64 toolchain prefix> > > + cd <U-Boot-dir> > > + make milkv_duo_defconfig > > + make > > + > > +This will generate u-boot-dtb.bin > > + > > +Booting > > +~~~~~~~ > > +Currently, we rely on vendor FSBL(First Stage Boot Loader) to initialize the > > +clock and load the u-boot image, then bootup from it. > > Thank you for providing documentation for the board. > > Could you please, additionally describe the procedure to run > u-boot-dtb.bin on top of FSBL. > I'd like to clarify your request for describing the procedure to run u-boot-dtb.bin on top of FSBL. Are you looking for a detailed, step-by-step guide to replicate the process and successfully run u-boot-dtb.bin, or would you prefer a more concise overview? Best regards Kongyang Liu > Best regards > > Heinrich > > > + > > +Sample boot log from Milk-V Duo board > > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > +.. code-block:: none > > + > > + U-Boot 2024.01-rc5-00010-g51965baa36 (Dec 28 2023 - 13:15:53 +0800)milkv_duo > > + > > + DRAM: 63.3 MiB > > + Core: 10 devices, 8 uclasses, devicetree: separate > > + Loading Environment from nowhere... OK > > + In: serial@4140000 > > + Out: serial@4140000 > > + Err: serial@4140000 > > + Net: No ethernet found. > > + milkv_duo# cpu detail > > + 0: cpu@0 rv64imafdc > > + ID = 0, freq = 0 Hz: L1 cache, MMU > > + milkv_duo# >
diff --git a/doc/board/index.rst b/doc/board/index.rst index 531e547e7e..a0bd534742 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -45,6 +45,7 @@ Board-specific doc sifive/index sipeed/index socionext/index + sophgo/index st/index starfive/index ste/index diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst new file mode 100644 index 0000000000..e097afdac6 --- /dev/null +++ b/doc/board/sophgo/index.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Sophgo +====== +.. toctree:: + :maxdepth: 1 + + milkv_duo diff --git a/doc/board/sophgo/milkv_duo.rst b/doc/board/sophgo/milkv_duo.rst new file mode 100644 index 0000000000..b63304b510 --- /dev/null +++ b/doc/board/sophgo/milkv_duo.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Milk-V Duo +========== + +CV1800B RISC-V SoC +------------------ +The CV1800B is a high-performance, low-power 1+1 64-bit RISC-V SoC from Sophgo. + +Mainline support +---------------- +The support for following drivers are already enabled: +1. ns16550 UART Driver. + +Building +~~~~~~~~ +1. Add the RISC-V toolchain to your PATH. +2. Setup ARCH & cross compilation environment variable: + +.. code-block:: console + + export CROSS_COMPILE=<riscv64 toolchain prefix> + cd <U-Boot-dir> + make milkv_duo_defconfig + make + +This will generate u-boot-dtb.bin + +Booting +~~~~~~~ +Currently, we rely on vendor FSBL(First Stage Boot Loader) to initialize the +clock and load the u-boot image, then bootup from it. + +Sample boot log from Milk-V Duo board +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.. code-block:: none + + U-Boot 2024.01-rc5-00010-g51965baa36 (Dec 28 2023 - 13:15:53 +0800)milkv_duo + + DRAM: 63.3 MiB + Core: 10 devices, 8 uclasses, devicetree: separate + Loading Environment from nowhere... OK + In: serial@4140000 + Out: serial@4140000 + Err: serial@4140000 + Net: No ethernet found. + milkv_duo# cpu detail + 0: cpu@0 rv64imafdc + ID = 0, freq = 0 Hz: L1 cache, MMU + milkv_duo#
Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC. Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> --- (no changes since v1) doc/board/index.rst | 1 + doc/board/sophgo/index.rst | 8 ++++++ doc/board/sophgo/milkv_duo.rst | 50 ++++++++++++++++++++++++++++++++++ 3 files changed, 59 insertions(+) create mode 100644 doc/board/sophgo/index.rst create mode 100644 doc/board/sophgo/milkv_duo.rst